EP2012298A2 - Procédé pour détecter le statut de pixels d'un affichage à écran plat et pilote d'affichage correspondant - Google Patents
Procédé pour détecter le statut de pixels d'un affichage à écran plat et pilote d'affichage correspondant Download PDFInfo
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- EP2012298A2 EP2012298A2 EP08250022A EP08250022A EP2012298A2 EP 2012298 A2 EP2012298 A2 EP 2012298A2 EP 08250022 A EP08250022 A EP 08250022A EP 08250022 A EP08250022 A EP 08250022A EP 2012298 A2 EP2012298 A2 EP 2012298A2
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- 238000000034 method Methods 0.000 title claims abstract description 43
- 238000001514 detection method Methods 0.000 claims abstract description 57
- 230000002159 abnormal effect Effects 0.000 claims abstract description 31
- 238000010586 diagram Methods 0.000 description 12
- 238000005516 engineering process Methods 0.000 description 4
- 238000012544 monitoring process Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000005352 clarification Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/04—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
- G09G3/06—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources
- G09G3/12—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources using electroluminescent elements
- G09G3/14—Semiconductor devices, e.g. diodes
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- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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- G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
- G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Definitions
- the present invention relates to flat panel display technology. More particularly, the present invention relates to methods for detecting pixel status of flat panel displays and display drivers thereof.
- a display device among the digital video/image processing apparatus is one of the significant devices for displaying related information. Users can read information from the display to further operate the apparatus thereby.
- a flat panel display manufactured with optoelectronic and semiconductor technologies e.g. a light emitting diode (LED) display, is highlighted in the display field. Since the LED display has advantages of large size, high display quality, high luminance, and wide view angle so that the LED display becomes a prevailing display of the large size display.
- the LED display has the following characteristic: when a pixel of the LED display is damaged, the pixel could be fixed by directly replacing the damaged LED with a new LED. So the technology for detecting the status of LED begins to appear in the LED display.
- the abnormal status of LEDs in LED display devices includes open-circuit, short-circuit and over temperature. In general, the method for detecting the status of LED may be classified to the following three technique in the prior art.
- Fig 1 is illustrated a LED driver in the prior art for explaining the first technique for detecting the status of LED in the prior art.
- each driving circuit 103-1 to 103-m connected to a plurality of pixels, has an alarm terminal coupled to the control unit 101.
- an alarm signal is sent to the control unit 101 from the alarm terminal of the driving circuit which is connected to the abnormal pixel in the pixels.
- the alarm terminals of the driving circuits 103-1 to 103-m are wired together to be coupled to the control unit 101 to reduce pin count of the control unit 101. But by doing so, the control unit 101 has difficulty in judging which pixel is abnormal.
- a detecting circuit is added to each driving circuit to detect pixel status and report the status to the control unit.
- the detecting circuit of each driving circuit has its own dedicated wires coupled to the control unit. Therefore the second technique will increase device cost and complexity of design.
- the driving circuit uses a mode-switch circuit and two control signals to switch the driving circuit between the display mode and the non-display mode.
- This technique has been disclosed by U.S. Patent No. 6,930,679 B2 .
- the serial data line can carry the pixel status information.
- using two control signals will increase complexity of firmware design and switching to the non-display mode may interrupt the images being displayed. This technique also can't meet the real-time monitoring requirement.
- a method for pixel status detection of a flat panel display which includes a display driver with a register to drive a pixel, comprises steps of: providing scan data to the register; using the scan data to drive the pixel; detecting the pixel status to obtain status data; refreshing the register with the status data; and comparing the scan data and the status data to determine whether the pixel is in abnormal status or not.
- Another method for pixel status detection of a flat panel display which includes a display driver with n shift registers to drive n pixels, comprises steps of: enabling the n pixels by the driver; detecting the n pixels' status to obtain the n status data; refreshing the n shift registers with the n status data; and determining which pixel in the n pixels is in abnormal status, according to the n status data, wherein n is a nature number.
- the display driver coupled to a plurality of pixels of a display, comprises m driving circuits and a control unit.
- the control unit of the display driver comprises a receiving terminal and a scan data terminal, wherein the scan data terminal is coupled to the data input terminal of the 1st driving circuit , and the receiving terminal is coupled to the data output terminal of the m th driving circuit to receive the status data sequentially, wherein the data input terminal of the 1 st driving circuit sequentially receives the scan data from the scan data terminal of the control unit according to a clock signal.
- positions of pixels which are in abnormal status can be pinpointed; no mode-switch circuit is required for pixel status detection and the number of terminals used for pixel status detection can be reduced; and real-time monitoring and invisible detection can be achieved without any interruption of the images being displayed.
- FIG. 1 is a schematic block diagram of a conventional display driver for pixel status detection.
- FIG. 2 is a schematic block diagram of a display driver for LED status detection according to a first embodiment of the present invention.
- FIG. 3 is a schematic block diagram of the internal connection of a LED driving circuit according to the first embodiment of the present invention.
- FIG. 4 is a flow chart illustrating a method for LED status detection according to the first embodiment of the present invention.
- FIG. 5 is a schematic block diagram of a display driver for LED status detection with smart detection function according to a second embodiment of the present invention.
- FIG. 6 is a schematic block diagram of the internal connection of a LED driving circuit with smart detection function according to the second embodiment of the present invention.
- FIG. 7 is a flow chart illustrating a method for LED status detection with smart detection function according to the second embodiment of the present invention.
- FIG. 8 is a timing diagram of a smart detection process according to the second embodiment of the present invention.
- the LED display has advantages of large size, high display quality, high luminance, and wide view angle so that the LED display becomes a prevailing display of the large size display.
- the LED display is used as an example to describe the embodiment of the present invention. But it should be noted that although in the following embodiments the pixel in the display is implemented by a LED, in other embodiments the pixel can be implemented by a thin film transistor and liquid crystal, an organic light emitting diode (OLED) or other light emitting device.
- OLED organic light emitting diode
- FIG. 2 is a schematic block diagram of a display driver for LED status detection according to a first embodiment of the present invention.
- the display driver comprises a control unit 201 and m driving circuits 203-1 to 203-m.
- the m driving circuits 203-1 to 203-m are connected in cascade. If each of the driving circuits 203-1 to 203-m can drive n LEDs, the display driver in FIG. 2 can drive m ⁇ n LEDs.
- Each driving circuit has a data input (DAI) terminal and a data output (DAO) terminal. Shift registers in each driving circuit 203-1 to 203-m can shift input data, bit by bit, from the data input (DAI) terminal toward the data output (DAO) terminal.
- DAI data input
- DAO data output
- the data input terminal of the driving circuit 203-1 is coupled to the scan data terminal of the control unit 201. And the scan data, carrying data of images to be displayed, are sent from the control unit 201 to the driving circuits 203-1 to 203-m via the scan data terminal.
- the data output terminal of the first driving circuit 203-1 is coupled to the data input terminal of the second driving circuit 203-2; the data output terminal of the second driving circuit 203-2 is coupled to the data input terminal of the third driving circuit (not shown in FIG. 2 ); and so on.
- the data output terminal of the last driving circuit 203-m is coupled to the receiving terminal of the control unit 201.
- Scan data are sent by the control unit 201 to driving circuits 203-1 to 203-m serially, one bit of scan data is sent in every clock (CLK).
- a detecting device in every driving circuit 203-1 to 203-m in FIG. 2 can detect the status of LEDs, while these LEDs are displaying an image, for example, image #K.
- image #K+1 When scan data of a new image, image #K+1, have been sent from the control unit 201 to shift registers in the driving circuits 203-1 to 203-m, the control unit will send a latch (LAT) signal to latch registers in the driving circuits 203-1 to 203-m to latch the scan data and a driving buffer device in each driving circuit 203-1 to 203-m will drive LEDs according to the data latched in the latch registers.
- LAT latch
- the detecting devices in every driving circuit 203-1 to 203-m will load the status data, carrying data of status of LEDs, to the shift registers in the driving circuits 203-1 to 203-m.
- These LED status data will be shifted out via data output (DAO) terminals of the driving circuits 203-1 to 203-m serially in synchronization with the clock (CLK) signal to the control unit 201 when the next new scan data, carrying data of image #K+2, are sent to the driving circuits 203-1 to 203-m.
- DAO data output
- control unit 201 can only determine whether those LEDs which have been turned on are in abnormal status.
- the control unit 201 can save the LED status data and the corresponding scan data in a memory device and compare the status data with the scan data to pinpoint the exact positions of those abnormal LEDs.
- the control unit 201 can send scan data which carry data of a white image to the driving circuits 203-1 to 203-m to turn on all LEDs. Because the LED status data will be shifted to the control unit 201 serially in synchronization with the clock (CLK) signal, the control unit 201 can count the clock (CLK) signal to pinpoint the exact positions of those abnormal LEDs.
- CLK clock
- FIG. 3 is a schematic block diagram of the internal connection of a driving circuit, for example, 203-1 in FIG. 2 according to the first embodiment of the present invention.
- the driving circuit 203-1 for driving for example, n LEDs comprises n shift registers 301-1 to 301-n, n latch registers 303-1 to 303-n, a driving buffer device 305, a detecting device 307, a data input (DAI) terminal, a data output (DAO) terminal, a clock (CLK) input terminal and a latch (LAT) input terminal.
- DAI data input
- DAO data output
- CLK clock
- LAT latch
- n latch registers 303-1 to 303-n their input terminals are coupled to the output terminals of n latch registers 303-1 to 303-n , and its output terminals are coupled to n LEDs.
- the detecting device 307 For the detecting device 307, its input terminals are coupled to LEDs, and its output terminals are coupled to n shift registers 301-1 to 301-n.
- the data input (DAI) terminal of the driving circuit 203-1 is coupled to the input terminal of the first shift register 301-1.
- the data output (DAO) terminal of the driving circuit 203-1 is coupled to the output terminal of the n th shift register 301-n.
- the clock (CLK) input terminal provides a clock signal to the driving circuit 203-1.
- the latch (LAT) input terminal is coupled to n latch registers 303-1 to 303-n and the detecting device 307.
- the CLK and LAT signals are sent to the driving circuit 203-1 from a control unit.
- the detecting device 307 in FIG. 3 can detect the status of n LEDs 309-1 to 309-n, while these LEDs are displaying an image, for example, image #K.
- a latch (LAT) signal will be sent to the latch registers 303-1 to 303-n to latch the scan data and the driving buffer device 305 will drive LEDs 309-1 to 309-n according to data latched in the latch registers 303-1 to 303-n.
- the detecting device 307 will load the status data of LEDs 309-1 to 309-n to the shift registers 301-1 to 301-n.
- These LED status data will be shifted out serially in synchronization with the clock (CLK) signal via the data output (DAO) terminal when scan data of a new image, image #K+2, are shifted in via the data input (DAI) terminal.
- FIG. 4 is a flow chart illustrating a method for LED status detection according to the first embodiment of the present invention.
- the control unit provides scan data to the shift registers (S401).
- the driving buffer devices will drive the LEDs according to the scan data (S403).
- the detecting devices can detect LEDs' status to obtain status data (S405).
- the detecting devices refresh the shift registers with the status data (S407).
- the status data will be shifted to the control unit and the control unit can compare the scan data with the status data to determine which LEDs are in abnormal status (S409).
- n-bit scan data for example, 01...1, as the data of the image #K
- the control unit 201 sends n-bit scan data, for example, 01...1, as the data of the image #K, to the driving circuit 203-1 in FIG. 3 . That is, a bit of logic 0 is shifted to the first shift register 301-1, a bit of logic 1 is shifted to the second shift register 301-2,..., and a bit of logic 1 is shifted to the n th shift register 301-n.
- the latch registers 303-1 to 303-n will latch the scan data of image #K when a latch (LAT) signal is sent to the driving circuit 203-1.
- LAT latch
- the driving buffer device will drive LEDs 309-1 to 309-n according to the data latched in the latch registers 303-1 to 303-n.
- the scan data are n bits, 01...1, so after the scan data are latched by latch registers 303-1 to 303-n, the first LED 309-1 is turned off, the second LED 309-2 is turned on ,..., and the n th LED 309-n is turned on.
- the detecting device 307 can detect the status of LEDs 309-1 to 309-n, now displaying image #K. It should be noted that only for those LEDs which are lit, the results of the status detection are meaningful. Assume the second LED 309-2 is abnormal. The detecting device 307 will find the second LED 309-2 is abnormal and saves an abnormal status bit, for example a bit of logic 0, in the second bit of the status data. For clarification, the status data corresponding to the status of LEDs when displaying image #K is called status data #K here.
- a latch (LAT) signal is sent to the driving device 203-1 again.
- the detecting device 307 will load the status data #K to the shift registers 301-1 to 301-n.
- the second bit, which is logic 0, of the status data #K is loaded to the second shift register 301-2.
- the status data #K in the shift registers 301-1 to 301-n will be shifted to the control unit 201 when next n-bit scan data, for image #K+2, are sent to shift registers 301-1 to 301-n.
- the control unit 201 can compare the scan data of image #K with the status data #K to determine which LED is abnormal.
- a bit of logic 1 in the scan data indicates the corresponding LED is turned on and the result of status detection of that LED is meaningful.
- the second bit of the scan data of image #K is logic 1 while the second bit of the status data #K is logic 0. So the control unit 201 knows the second LED 309-2 is abnormal.
- FIG. 5 is a schematic block diagram of a display driver for LED status detection with smart detection function according to a second embodiment of the present invention.
- the display driver comprises a control unit 501 and m driving circuits 503-1 to 503-m.
- the m driving circuits 503-1 to 503-m are connected in cascade. If each of the driving circuits 503-1 to 503-m can drive n LEDs, the display driver in FIG. 5 can drive m ⁇ n LEDs.
- Each driving circuit 503-1 to 503-m has a data input (DAI) terminal and a data output (DAO) terminal.
- DAI data input
- DAO data output
- Shift registers in each driving circuit 503-1 to 503-m can shift input data, bit by bit, from the data input (DAI) terminal toward the data output (DAO) terminal.
- the data input terminal of the first driving circuit 503-1 is coupled to the scan data terminal of the control unit 501.
- the data output terminal of the first driving circuit 503-1 is coupled to the data input terminal of the second driving circuit 503-2; the data output terminal of the second driving circuit 503-2 is coupled to the data input terminal of the third driving circuit (not shown in FIG. 3 ); and so on.
- the data output terminal of the last driving circuit 503-m is coupled to the receiving terminal of the control unit 501.
- Scan data, carrying data of images to be displayed, are sent by the control unit 501 via its scan data terminal to driving circuits 503-1 to 503-m serially, one bit of scan data is sent in every clock (CLK).
- a smart detection (SDT) signal is used in FIG. 5 .
- a smart detection process starts when the smart detection (SDT) signal, sent by the control unit 501, is received by the driving circuits 503-1 to 503-m and ends when the first latch (LAT) signal following the smart detection signal is received by the driving circuits 503-1 to 503-m.
- Driving buffer devices in the driving circuits 503-1 to 503-m will drive and turn on all LEDs when a smart detection (SDT) signal is received by the driving circuits 503-1 to 503-m, wherein the driving buffer devices will reduce the brightness of all LEDs when lighting them, so human eyes can't sense any interruption of images being displayed in a display device and the so-called invisible detection can be achieved when the smart detection is in process.
- Detecting devices in the driving circuits 503-1 to 503-m will detect the status of LEDs when all LEDs are lit and load the status data, carrying data of status of LEDs, to shift registers in the driving circuits 503-1 to 503-m. These LED status data will be shifted out via data output (DAO) terminals of the driving circuits 503-1 to 503-m to the control unit 501 serially in synchronization with the clock (CLK) signal following the smart detection (SDT) signal. Because the status data of LEDs will be shifted to the control unit 501 serially in synchronization with the clock (CLK) signal, the control unit 501 can count the clock (CLK) signal to pinpoint the exact positions of those abnormal LEDs.
- DAO data output
- CLK clock
- SDT smart detection
- FIG. 6 is a schematic block diagram of the internal connection of a driving circuit, for example, 503-1 in FIG. 5 with the smart detection function according to the second embodiment of the present invention.
- the driving circuit 503-1 for driving for example, n LEDs comprises n shift registers 601-1 to 601-n, n latch registers 603-1 to 603-n, a driving buffer device 605, a LED status detection circuit 607, a data input (DAI) terminal, a data output (DAO) terminal, a clock (CLK) input terminal, a latch (LAT) input terminal and a smart detection (SDT) input terminal.
- DAI data input
- DAO data output
- CLK clock
- LAT latch
- SDT smart detection
- the data output terminal of the i th shift register is coupled the data input terminal of the (i+1) th shift register, wherein i is an integer and 0 ⁇ i ⁇ n.
- n latch registers 603-1 to 603-n For the driving buffer device 605, its input terminals are coupled to the output terminals of n latch registers 603-1 to 603-n , and its output terminals are coupled to n LEDs.
- the detecting device 607 For the detecting device 607, its input terminals are coupled to LEDs, and its output terminals are coupled to n shift registers 601-1 to 601-n.
- the data input (DAI) terminal of the driving circuit 503-1 is coupled to the input terminal of the first shift register 601-1.
- the data output (DAO) terminal of the driving circuit 503-1 is coupled to the output terminal of the n th shift register 601-n.
- the clock (CLK) input terminal provides a clock signal to the driving circuit 503-1.
- the latch (LAT) input terminal is coupled to n latch registers 603-1 to 603-n.
- the smart detection (SDT) input terminal is coupled to the detecting device 607.
- the CLK, LAT and SDT signals are sent to the driving circuit 503-1 from a control unit.
- the smart detection process starts when a smart detection (SDT) signal is received by the driving circuit 503-1 and ends when the first latch (LAT) signal following the smart detection signal is received by the driving circuit 503-1.
- the driving buffer device 605 will drive and turn on all n LEDs 609-1 to 609-n when a smart detection (SDT) signal is received by the driving circuit 503-1.
- the detecting device 607 can directly control the driving buffer device 605 to drive and turn on all n LEDs 609-1 to 609-n, or the detecting device 607 can load, for example, all 1s to n shift registers 601-1 to 601-n to control the driving buffer device 605 to drive and turn on all n LEDs 609-1 to 609-n.
- the driving buffer device 605 When the driving buffer device 605 is lighting n LEDs 609-1 to 609-n under smart detection, the driving buffer device 605 will reduce the brightness of all n LEDs 609-1 to 609-n, so human eyes can't sense any interruption of the images in a display device when the smart detection is in process.
- the detecting device 607 will detect the status of n LEDs 609-1 to 609-n when all n LEDs are lit and load the status data of n LEDs to n shift registers 601-1 to 601-n. These LED status data will be shifted out via the data output (DAO) terminal serially in synchronization with the clock (CLK) signal following the smart detection (SDT) signal.
- DAO data output
- CLK clock
- FIG. 7 is a flow chart illustrating a method for LED status detection with smart detection function according to the second embodiment of the present invention.
- the control unit sends the smart detection signal to detecting devices (S701).
- the detecting devices will control the driving buffer devices to drive and turn on all LEDs (S703).
- the detecting devices can detect all LEDs' status to obtain status data (S705).
- the detecting devices refresh the shift registers with the status data (S707).
- the status data will be shifted to the control unit and the control unit can determine which LEDs are in abnormal status according to the status data (S709).
- FIG. 8 is a timing diagram of a smart detection process according to the second embodiment of the present invention.
- the clock (CLK), data input (DAI), latch (LAT), smart detection (SDT) and data output (DAO) signals are shown in the timing diagram.
- CLK clock
- DAI data input
- LAT latch
- SDT smart detection
- DAO data output
- a driving circuit which can drive eight LEDs is used as an example.
- the smart detection process starts when a smart detection (SDT) signal is received by the driving circuit and ends when the first latch (LAT) signal following the smart detection (SDT) signal is received by the driving circuit.
- All eight LEDs will be turned on and all eight LEDs' status will be detected when the SDT signal is received by the driving circuit. Then the status data of eight LEDs will be loaded to the eight shift registers to be shifted out via the DAO signal to the next device, which may be a control unit or another driving circuit.
- the DAO signal will be synchronous with the rising edge of the clock (CLK) signal as shown in FIG. 8 . If logic "1" represents a normal LED status and logic "0" represents an abnormal LED status, the DAO signal in FIG. 8 shows the 2 nd LED and the 5 th LED are abnormal, wherein the order of the eight LEDs is in the order from the data input (DAI) terminal to the data output (DAO) terminal of the driving circuit.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
- Liquid Crystal (AREA)
- Electroluminescent Light Sources (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Led Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW096124016A TW200903415A (en) | 2007-07-02 | 2007-07-02 | Device and method for driving light-emitting diodes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP2012298A2 true EP2012298A2 (fr) | 2009-01-07 |
| EP2012298A3 EP2012298A3 (fr) | 2009-12-30 |
Family
ID=39800568
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP08250022A Withdrawn EP2012298A3 (fr) | 2007-07-02 | 2008-01-03 | Procédé pour détecter le statut de pixels d'un affichage à écran plat et pilote d'affichage correspondant |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP2012298A3 (fr) |
| JP (1) | JP2009015281A (fr) |
| KR (1) | KR100938620B1 (fr) |
| TW (1) | TW200903415A (fr) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2149870A2 (fr) | 2008-07-29 | 2010-02-03 | Starchips Technology Inc. | Circuit de commande de diode électroluminescente et procédé associé |
| WO2011022193A1 (fr) * | 2009-08-20 | 2011-02-24 | Global Oled Technology Llc | Détection de défauts dans des afficheurs electroluminescents |
| US9892667B2 (en) | 2014-02-19 | 2018-02-13 | Joled Inc. | Display device and method for driving same |
| CN113487988A (zh) * | 2021-06-23 | 2021-10-08 | 惠科股份有限公司 | 显示面板的侦测方法和显示面板 |
| EP4478343A4 (fr) * | 2022-07-14 | 2025-04-23 | Boe Technology Group Co., Ltd. | Puce de commande, substrat électroluminescent ainsi que procédé de test associé, et appareil d'affichage |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI424401B (zh) * | 2009-11-02 | 2014-01-21 | Chunghwa Picture Tubes Ltd | 顯示器與其閘極驅動電路 |
| JP6046404B2 (ja) * | 2012-07-18 | 2016-12-14 | 矢崎総業株式会社 | 表示装置 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6930679B2 (en) | 2002-11-22 | 2005-08-16 | Macroblock, Inc. | System of LED drivers for driving display devices |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3987004B2 (ja) * | 2003-06-09 | 2007-10-03 | 日本テキサス・インスツルメンツ株式会社 | 駆動回路およびこれを有する表示システム |
| KR100612119B1 (ko) * | 2004-07-07 | 2006-08-14 | 엘지전자 주식회사 | 발광 픽셀 불량 검출용 패널 |
-
2007
- 2007-07-02 TW TW096124016A patent/TW200903415A/zh unknown
- 2007-10-24 JP JP2007276920A patent/JP2009015281A/ja active Pending
- 2007-10-25 KR KR1020070107596A patent/KR100938620B1/ko not_active Expired - Fee Related
-
2008
- 2008-01-03 EP EP08250022A patent/EP2012298A3/fr not_active Withdrawn
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6930679B2 (en) | 2002-11-22 | 2005-08-16 | Macroblock, Inc. | System of LED drivers for driving display devices |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2149870A2 (fr) | 2008-07-29 | 2010-02-03 | Starchips Technology Inc. | Circuit de commande de diode électroluminescente et procédé associé |
| WO2011022193A1 (fr) * | 2009-08-20 | 2011-02-24 | Global Oled Technology Llc | Détection de défauts dans des afficheurs electroluminescents |
| US9892667B2 (en) | 2014-02-19 | 2018-02-13 | Joled Inc. | Display device and method for driving same |
| CN113487988A (zh) * | 2021-06-23 | 2021-10-08 | 惠科股份有限公司 | 显示面板的侦测方法和显示面板 |
| EP4478343A4 (fr) * | 2022-07-14 | 2025-04-23 | Boe Technology Group Co., Ltd. | Puce de commande, substrat électroluminescent ainsi que procédé de test associé, et appareil d'affichage |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2012298A3 (fr) | 2009-12-30 |
| KR100938620B1 (ko) | 2010-01-22 |
| JP2009015281A (ja) | 2009-01-22 |
| KR20090004325A (ko) | 2009-01-12 |
| TW200903415A (en) | 2009-01-16 |
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