EP2097982A1 - Regelschleifeneinrichtung und sigma-delta-modulator - Google Patents

Regelschleifeneinrichtung und sigma-delta-modulator

Info

Publication number
EP2097982A1
EP2097982A1 EP07821924A EP07821924A EP2097982A1 EP 2097982 A1 EP2097982 A1 EP 2097982A1 EP 07821924 A EP07821924 A EP 07821924A EP 07821924 A EP07821924 A EP 07821924A EP 2097982 A1 EP2097982 A1 EP 2097982A1
Authority
EP
European Patent Office
Prior art keywords
noise
input
signal
loop
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP07821924A
Other languages
English (en)
French (fr)
Inventor
Jean-Michel Hode
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Publication of EP2097982A1 publication Critical patent/EP2097982A1/de
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/38—Calibration
    • H03M3/386—Calibration over the full range of the converter, e.g. for correcting differential non-linearity
    • H03M3/388—Calibration over the full range of the converter, e.g. for correcting differential non-linearity by storing corrected or correction values in one or more digital look-up tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/412—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M3/422—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M3/424—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a multiple bit one

Definitions

  • the invention also relates to a sigma-delta modulator for converting an analog input signal into a digital output signal from an analog-to-digital converter, the input analog signal being magnified by a high factor. at the input of the analog-to-digital converter and the digital output signal being subtracted from the input signal after conversion by a digital-to-analog converter having a multiplicative noise. Compensation noise is added to the input signal of the modulator, the compensation noise being substantially equal to the input signal of the modulator multiplied by the mutliplicative noise of the digital-to-analog converter.
  • the input signal and the compensation noise can be injected into the modulator by summing the currents of the differential amplifier in the branches of a cascode of the digital-to-analog converter.
  • the loopback further includes a digital-to-analog converter 1 1, which will be called a loopback CNA thereafter, which makes it possible to convert the digital signal back to analog.
  • output of CAN 10 to subtract it from the input signal e in principle of the closed loop control.
  • a high G gain amplifier 13 then amplifies e - s.
  • the amplifier 13 and the filter 14 in the feedback loop of FIG. 3b make it possible in combination to circumvent the disadvantage of conventional ADCs: they make it possible to associate high frequency and fine resolution.
  • the amplifier 13 compresses the quantization noise, thus decreasing the error and increasing the accuracy.
  • the filter 14 makes it possible to increase the frequency while preventing the loop from diverging.
  • the architecture of the circuit of Figure 3b is quite remarkable because it applies conventional mounting principles to very specific components, the individual behavior of the components always being complementary to the mounting principles. This allows the entire system to converge in a rather natural way towards the desired goal.
  • CAN and CNA sounds are compressed in the same proportions, but by different means: the noise of the CAN is conventionally compressed by the loop, while the noise of the CNA is compressed by the device according to the invention by adding the compensation noise to the input signal.
  • FIG. 5 illustrates an example of estimation of the compensation noise in a modulator ⁇ according to the invention from the same

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
EP07821924A 2006-10-31 2007-10-26 Regelschleifeneinrichtung und sigma-delta-modulator Ceased EP2097982A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0609560A FR2907987B1 (fr) 2006-10-31 2006-10-31 Dispositif de boucle fermee d'asservissement et modulateur sigma-delta
PCT/EP2007/061564 WO2008052948A1 (fr) 2006-10-31 2007-10-26 Dispositif de boucle fermee d'asservissement et modulateur sigma-delta

Publications (1)

Publication Number Publication Date
EP2097982A1 true EP2097982A1 (de) 2009-09-09

Family

ID=38069326

Family Applications (1)

Application Number Title Priority Date Filing Date
EP07821924A Ceased EP2097982A1 (de) 2006-10-31 2007-10-26 Regelschleifeneinrichtung und sigma-delta-modulator

Country Status (4)

Country Link
US (1) US7965210B2 (de)
EP (1) EP2097982A1 (de)
FR (1) FR2907987B1 (de)
WO (1) WO2008052948A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2938083B1 (fr) * 2008-10-31 2013-03-29 Thales Sa Procede d'amelioration de la resolution et de correction des distorsions pour modulateur sigma-delta et modulateur sigma-delta mettant en oeuvre le procede
EP2749893A1 (de) * 2012-12-31 2014-07-02 Imec Niederfrequenzrauschmessung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5500645A (en) * 1994-03-14 1996-03-19 General Electric Company Analog-to-digital converters using multistage bandpass delta sigma modulators with arbitrary center frequency
US5623263A (en) * 1995-10-20 1997-04-22 National Science Council 4th-order sigma-delta modulator with leapfrog topology
US5889482A (en) * 1997-10-06 1999-03-30 Motorola Inc. Analog-to-digital converter using dither and method for converting analog signals to digital signals
US6271781B1 (en) * 1998-06-10 2001-08-07 Lockheed Martin Corporation Nonlinear filter correction of multibit ΣΔ modulators
US6191715B1 (en) * 1998-10-29 2001-02-20 Burr-Brown Corporation System for calibration of a digital-to-analog converter
US6940436B2 (en) * 2003-10-31 2005-09-06 Texas Instruments Incorporated Analog-to-digital conversion system with second order noise shaping and a single amplifier
GB2425668B (en) * 2005-01-17 2009-02-25 Wolfson Microelectronics Plc Pulse width modulator quantisation circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2008052948A1 *

Also Published As

Publication number Publication date
FR2907987A1 (fr) 2008-05-02
US7965210B2 (en) 2011-06-21
US20100060499A1 (en) 2010-03-11
WO2008052948A1 (fr) 2008-05-08
FR2907987B1 (fr) 2009-01-23

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