EP2193697A2 - Procédé de production d'un bloc de composants électroniques et bloc de composants électroniques correspondants - Google Patents

Procédé de production d'un bloc de composants électroniques et bloc de composants électroniques correspondants

Info

Publication number
EP2193697A2
EP2193697A2 EP08803865A EP08803865A EP2193697A2 EP 2193697 A2 EP2193697 A2 EP 2193697A2 EP 08803865 A EP08803865 A EP 08803865A EP 08803865 A EP08803865 A EP 08803865A EP 2193697 A2 EP2193697 A2 EP 2193697A2
Authority
EP
European Patent Office
Prior art keywords
electronic
electronic component
circuit board
printed circuit
electronic assembly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP08803865A
Other languages
German (de)
English (en)
Inventor
Andreas Kugler
Gerhard Liebing
Dirk Freundt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2193697A2 publication Critical patent/EP2193697A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • H05K1/188—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
    • H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10666—Plated through-hole for surface mounting on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H10W44/241—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for passive devices or passive elements
    • H10W44/248—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for passive devices or passive elements for antennas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07321—Aligning
    • H10W72/07323—Active alignment, e.g. using optical alignment using marks or sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9413—Dispositions of bond pads on encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/10—Configurations of laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Definitions

  • the invention relates to a method for producing an electronic assembly, in particular for high-frequency applications, comprising at least one electronic component which is mounted on a printed circuit board, and an electronic assembly according to the preamble of claim 7.
  • Electronic components for high frequency applications comprising at least one electronic component mounted on a printed circuit board are used, for example, in high frequency radar sensors. These are used for example as distance radar application in motor vehicles.
  • high-frequency radar sensors are constructed in so-called chip-on-board (CoB) technology.
  • integrated circuits for high-frequency applications (high-frequency ICs (MMICs)) are mounted on specially prepared printed circuit boards, for example in cavities of these printed circuit boards. Subsequently, the integrated circuit (IC) is contacted by wire bonds to the circuit board.
  • MMICs integrated circuits
  • a method for producing an electrical circuit wherein the circuit comprises electrical components which are mechanically interconnected by a potting compound. On at least one side of the potting compound, at least one layer of conductor tracks is provided, which electrically connects the components to one another.
  • the components are applied to a carrier film and then encapsulated with a potting compound. Subsequently, the carrier film is removed and on the side on which the components were connected to the carrier film, one or more layers of conductor tracks are applied, which electrically connect the components to one another.
  • the inventive method for producing an electronic assembly in particular for high frequency applications, comprising at least one electronic component that is mounted on a printed circuit board and at least one printed conductor structure, with which the at least one electronic component is contacted, comprises the following steps:
  • the electronic components can be positioned exactly.
  • the subsequent laminating of the conductive carrier film with the at least one electronic component attached thereto to a printed circuit board carrier, wherein the at least one electronic component points in the direction of the printed circuit board carrier the at least one electronic component is enclosed by the printed circuit board carrier.
  • the device is completely encapsulated.
  • the necessary conductor tracks are produced in a simple manner. A fast and cost-effective production of the electronic module is thereby possible.
  • solder pads on the vias formed in the electronic package enables the electronic package to be easily connected to, for example, a printed circuit board.
  • the connection can be made by the so-called SMD (Surface Mounted Device) technique.
  • SMD Surface Mounted Device
  • the attachment to the circuit board by means of the soldering points applied to the electronic component takes place.
  • An additional connection of the electronic assembly by wire bonds, as is known from the prior art, is not required. A cost-effective installation is thus possible.
  • soldering points already represent electronic contact points.
  • the soldering points already represent electronic contact points.
  • the at least one electronic component is enclosed by a polymer compound after being attached to the conductive carrier film.
  • the enclosing of the at least one electronic component with the polymer compound leads to an additional protection of the component. As a result, the risk of damage is significantly reduced even with sensitive components.
  • the polymer composition with which the at least one electronic component is enclosed is, for example, a low-pressure molding compound, for example an epoxy low-pressure molding compound.
  • the low-pressure molding compound is applied, for example, by a transfer molding process.
  • additional spacers can be kept free, for example for thicker dielectrics. However, these can also be encapsulated as inserts during encapsulation of the at least one electronic component.
  • the attachment of the at least one electronic component is preferably carried out by gluing.
  • the conductive carrier film it is preferable for the conductive carrier film to have an adhesive layer.
  • the adhesive layer preferably forms the insulating layer at the same time.
  • the conductive carrier foil is, for example, a self-adhesive conductive carrier foil.
  • the sticking can be done by hot and pressure processes. This is also a hot glue process, for example.
  • the conductive base film used is, for example, a copper foil, also known as printed circuit board RCC material.
  • Other suitable conductive films are, for example, LCP films or FEP films.
  • As a metal is suitable in addition to copper, for example, aluminum.
  • alignment marks are introduced into the conductive carrier foil.
  • the Justagemarken are, for example, holes or blind holes with any cross section. These can be introduced, for example, by etching, punching or drilling in the conductive carrier film.
  • the Justagemarken be mounted on the at least one electronic component opposite side of the conductive carrier film.
  • the alignment marks allow the exact position of the at least one electronic component to be determined even after enclosing the at least one electronic component with the polymer mass or after laminating the conductive carrier foil to the printed circuit board carrier. This is necessary for contacting the at least one electronic component.
  • suitable as Justagemarken for example, components with which the conductive film is equipped. At the locations where the devices are located, the conductive foil is preferably drilled or x-rayed to detect the devices.
  • the Justagemarken may of course also have any other known to the expert form.
  • holes are preferably inserted.
  • the holes are metallized, for example.
  • the introduction of the holes is done for example by laser drilling.
  • the positions at which the holes are inserted are determined by the adjustment marks.
  • the metallization of the holes in order to achieve a contact of the electronic component with the conductive carrier film is carried out by methods known in the art.
  • the metallization can be carried out, for example, by electroless metal deposition. Electroless metal deposition is a common process used in printed circuit board manufacturing.
  • the metallization of the holes is preferably carried out with copper.
  • Further interconnects can be applied, for example, by applying further layers containing printed conductors to the conductive carrier film structured in step (c).
  • a dielectric is preferably first applied, by means of which the conductor tracks formed in step (c) are covered. At the same time this results in an isolation of the conductor tracks, so that no unwanted electrical contact with the conductor tracks of the subsequently applied layer takes place.
  • further printed conductors are applied to the dielectric by methods known to those skilled in the art.
  • the further layers which contain printed conductors can also be produced by applying further conductive films to the first layer and then structuring the film to form printed conductors.
  • At least one conductor track structure of the electronic assembly comprises an antenna structure.
  • the antenna structure can take on any suitable form which is suitable for use in, for example, high-frequency radar sensors. Also, the antenna structure may take any other suitable form suitable, for example, for transmitting or receiving signals. Advantage of the embodiment in which the conductor track structure is also an antenna structure is included, that a testing of the electronic assembly is possible hinh lent to all applications.
  • a functional check is performed in an adapter after the application of the solder points.
  • the electronic module can already be checked for all functions and it can be subdivided into faulty and functional modules.
  • the faulty modules can be sorted out before assembly on the circuit board and the production of the finished component.
  • the electronic assembly is applied to a circuit board.
  • the electronic assembly is applied to the PCB after performing the functional check.
  • Another advantage of the method according to the invention is that a cost-effective encapsulation of passive and active electronic components is achieved by enclosing the at least one electronic component with the polymer mass or by embedding the electronic component in the printed circuit board carrier.
  • the electronic assembly is very reliable due to the complete encapsulation of sensitive components.
  • Another advantage of encapsulation is that it allows height compensation when different sized components are used.
  • the method according to the invention avoids risky mixing techniques in production, for example soldering, gluing and wire bonding.
  • the electronic assembly in high frequency engineering, i. If the electronic component is a high-frequency component, reproducible high-frequency transitions are achieved by the planar output structure achieved by the method according to the invention.
  • the method according to the invention also makes it possible to integrate any necessary heat sinks on power semiconductors. These can, for example, contact the electronic component on the side facing away from the conductive carrier film. Alternatively, it is also possible for these to be embedded, for example, in the polymer compound, with which the at least one electronic component is enclosed.
  • the invention relates to an electronic assembly, comprising at least one electronic component, which is connected to a conductor track structure on a printed circuit board.
  • the at least one electronic component is embedded in a printed circuit board carrier and the printed conductor structure is arranged on the surface of the printed circuit board.
  • Through holes are formed in the electronic subassembly which are connected to the printed circuit board. structure are connected and lead to the bottom of the electronic module, with soldering points are attached to the vias.
  • the expensive substrate and package technology as currently used in the prior art, is replaced or reduced to a small component.
  • the electronic assembly according to the invention it is possible with the electronic assembly according to the invention to concentrate a complete high-frequency circuit on a module including antennas.
  • the electronic assembly produced according to the invention can be further processed as a standard component.
  • the conductor track structure is formed in a plurality of layers. As a result, an increased land use on an electronic circuit board is possible. Due to the additional layers, the electronic module can be equipped and contacted with components in the smallest possible space.
  • the conductor track structure comprises an antenna structure.
  • the antenna structure can take any suitable form known to those skilled in the art with which signals can be transmitted or received by the electronic module.
  • At least one electronic component is an IC.
  • the electronic module contains one or more mechanical components.
  • the at least one electronic component comprises an evaluation circuit.
  • the high-frequency ICs and optionally the evaluation are mounted below the interconnect structure and the antenna structure.
  • the dimensions of the antenna determine the size of the electronic package.
  • the high-frequency technology can be fully integrated into the electronic module, no high-frequency transitions outside the electronic module are necessary. Also, a high reliability can be achieved by the complete encapsulation of sensitive electronic components. If the evaluation electronics are not integrated in the electronic module, it is possible to use the electronic module independently of the evaluation electronics in different radar systems.
  • heat sinks and / or thermal vias e.g. Cooling channels, integrated.
  • a heat sink for example, it is also possible to integrate into the electronic assembly a metal core to which the at least one electronic component is connected. The electronic component then gives off heat to the metal core during operation, via which it can be released to the outside.
  • the inventive electronic assembly can generally be further processed as a standard component. Further processing is also possible, for example, as BGA (Ball Grid Array). In this case, the connections for the SMD assembly are compact on the underside of the module.
  • BGA Bit Grid Array
  • electronic components which are used in the inventive method or in the electronic assembly designed according to the invention are all electronic components known to the person skilled in the art, such as are used in printed circuit board technology and microelectronics, in particular in high-frequency engineering.
  • mechanical components all components come into consideration, as they are used in printed circuit board technology.
  • FIGS. 1 to 7 show several steps in the production of an electronic assembly
  • FIG. 8 schematic representation of an electronic assembly with adapter
  • FIG. 1 shows a conductive carrier foil 1 comprising a conductive layer 3 and an insulating layer 5.
  • the insulating layer 5 is preferably an adhesive layer or a thermoplastic, to which electronic components can be applied.
  • adjustment marks 7 are introduced on the side of the conductive carrier film 1, on which the conductive layer 3 is located.
  • the alignment marks 7 can be introduced, for example, by etching, stamping, drilling, for example laser drilling, in the conductive carrier film 1.
  • the alignment marks are also components connected to the conductive carrier film 1, which are bored free or detected by X-ray microscopy. Any other, known to the expert form for Justagemarken is possible.
  • the conductive layer 3 is preferably a metal layer. Particularly preferred as the metal is copper.
  • electronic components 9 are applied to the insulating layer. This is shown in FIG.
  • mechanical components it is also possible for mechanical components to be applied to the insulating layer 5 of the conductive carrier film 1.
  • the electronic components 9 or mechanical components which are applied to the insulating layer 5 of the conductive carrier film 1 are conventional components, as used in printed circuit board construction. These are, for example, chips, processors, high-frequency components, SMD components, antenna modules, heat sinks, MEMS or MOEMS.
  • the application of the electronic components 9 or mechanical components is preferably carried out by adhering to the insulating layer 5.
  • the electronic components 9 are placed on the insulating layer 5 of the conductive substrate 1, as the electronic components 9 may be later in the electrical circuit should. It can be applied to individual or all electronic components 9 heatsink to ensure increased heat dissipation during operation of the electronic components 9.
  • the optionally providable heat sinks are hereby placed on the side of the electronic components 9, which faces away from the conductive carrier film 1.
  • the polymer composition 11 is, for example, an epoxy low pressure molding compound.
  • placeholders for thicker dielectrics can be incorporated into the polymer mass 11. which are used, for example, for antennas or heat sinks to be overmoulded.
  • the wrapping with the polymer compound 11 takes place for example by means of a transfer molding process.
  • the placeholders can be formed for example as depressions or trays.
  • any other method known to those skilled in the art can be used with which the electronic components 9 can be encased with the polymer compound 11.
  • the jacket with the polymer compound 11 has the advantage that a height compensation for components 9 with different thickness is possible. This is advantageous for the subsequent lamination process.
  • Components can also be pre-encapsulated on peelable film and mounted on the carrier film 1 after removing the film.
  • the conductive film 1 is cut to PCB blank.
  • the conductive foil 1 with the electronic components 9 mounted thereon and, if appropriate, further mechanical components, which are not shown here, are laminated onto a printed circuit board carrier 13.
  • a printed circuit board carrier 13 This is shown in FIG.
  • the conductive foil 1 has been laminated with the electronic components 9 on the printed circuit board carrier 13, without the electronic components 9 being enclosed by the polymer mass 11.
  • the embodiment shown in FIG. 3, in which the electronic components 9 are enclosed by the polymer compound 11, is also laminated onto the printed circuit board carrier 13. The lamination takes place by methods known to those skilled in the art.
  • the printed circuit board carrier 13 is laminated onto the conductive film 1 in such a way that the electronic components 9 or the electronic components 9 surrounded by the polymer compound 11 are enclosed by the printed circuit board carrier 13.
  • the printed circuit board carrier 13 is laminated on the side on the conductive film 1, on which the electronic components 9 are mounted.
  • a glass-fiber reinforced and pre-drilled at the points of the components 9 cured printed circuit board material is placed on the film.
  • a prepreg and, if appropriate, another cured printed circuit board material is applied.
  • This stack is then pressed in a lamination process.
  • the cured circuit board material is usually a glass fiber reinforced epoxy resin.
  • a prepreg is generally also used an epoxy resin. However, this is not completely cured. By applying pressure and an elevated temperature, the prepreg completely cures, thereby bonding it to the cured circuit board material.
  • the composite of prepreg and cured printed circuit board material forms the printed circuit board carrier 13.
  • holes 17 in the carrier foil 1, comprising the conductive layer 3 and 3, are formed at the connection points of the electronic components 9 the insulating layer 5, introduced.
  • the correct positioning of the holes 17 can be determined by the initially introduced adjustment marks 7. This makes it possible to create the holes 17 exactly at the positions where the electrical connections of the electronic components 9 are located.
  • cooling channels 31 are drilled in the printed circuit board carrier 13.
  • a laser drilling method is used. If the holes 17 are also produced by a laser drilling method, a second laser is preferably used for the cooling channels 31. But it can also be drilled holes 17 and cooling channels 31 with the same laser.
  • the electronic components 9 are electrically contacted with the conductive layer 3. This is shown in FIG.
  • metal 19 is deposited in the holes 17 by methods known to those skilled in the art, for example by electroless metal deposition. This metal connects the terminals of the electronic components 9 to the printed conductor structure 15. An electronic contact was made.
  • the metal 19 used for metallization is copper.
  • a starting metallization of palladium is generally first deposited without current. This is followed by a galvanic copper deposition.
  • the metal 19 may take the form of a sleeve or fill the holes 17 completely.
  • the conductive layer 3 After the introduction of the holes 17 for the contacting of the electronic components 9 in the conductive film 1 and the metallization of the holes 17, the conductive layer 3, as shown in Figure 5, structured.
  • the structuring is carried out by any known to the expert method. Suitable methods are, for example, etching methods, photoresist methods, laser drilling methods or laser ablation methods. By structuring the conductive layer necessary for the circuit board trace structures 15 are generated.
  • FIG. 7 shows an electronic module
  • An electronic subassembly 21 comprises a printed circuit board carrier 13 with printed conductor structure 15 mounted thereon, as shown in FIG.
  • a dielectric 23 is applied to the printed conductor structure 15 in order to apply at least one further printed conductor structure 27.
  • a dielectric 25 are, for example, epoxy resins or FR4 materials that are known from printed circuit board technology.
  • the application of the dielectric 23 takes place with the usual methods known to the person skilled in the art. For example, it is possible to apply the dielectric 23 by doctoring, brushing, printing, laminating, curtain casting, film coating, spray coating or similar methods.
  • the further wiring pattern 25 is applied. For this purpose, it is possible first to completely apply a conductive layer, which is subsequently patterned.
  • first laminate the dielectric 23 and then a conductive film After laminating the dielectric 25 and the conductive foil, first holes 27 are introduced, which are then metallized to form the conductive foil. He to electrically connect with underlying layers. Subsequently, a further conductor track structure 25 is worked out of the conductive foil.
  • the electronic module 21 is to be used as a high-frequency radar sensor, it is preferred if at least one of the conductor track structures 15, 25 represents an antenna structure.
  • the uppermost of the conductor track structures 15, 25 is preferably the antenna structure.
  • any other conductor track structure 15, 25 contains the antenna structure.
  • cooling channels 31 In order to remove heat from the electronic components 9, it is possible to introduce cooling channels 31 into the printed circuit board carrier 13 on the side of the electronic components 9 facing away from the printed conductor structures 15, 25.
  • the cooling channels 31 can be connected to a metal core, not shown here. Heat is removed from the electronic components 9 via the metal core and the cooling channels 31. If a metal core is contained in the electronic module 21, the bonding of the cooling channels 31 to the metal core 33 is generally effected via a backside metallization or also via alternative connections, in which the inner walls of the cooling channels 31 are provided with a metal layer. It is also possible to completely fill the cooling channels 31 with a metal.
  • cooling elements between an optionally contained metal core and the electronic components 9. It is also possible to make the metal core so that it contacts the electronic components 9 directly. Alternatively, it is also possible that no metal core is provided, but cooling elements are provided between the electronic components 9. In this case, it is preferable if the cooling elements directly contact the electronic components 9. Suitable cooling elements are, for example, Peltier elements.
  • the electronic components 9 and the printed conductor structures 15, 25 are furthermore connected to plated-through holes 33.
  • the plated-through holes 33 are generally formed in the form of bores in the electronic module 21.
  • the plated-through holes 33 are preferably provided with a metal layer 34. Alternatively, it is also possible to completely fill the through-contacts 33 with a metal.
  • soldering points 35 are used for later attachment of the electronic component 9, for example, on a printed circuit board.
  • an electrical contacting of the electronic module 21 is made possible via the solder points 35.
  • the electronic module 21, as shown in FIG. 9, is fastened, for example, on a printed circuit board 45.
  • soldering points 35 it is possible to connect the electronic module 21 by an SMD method with the circuit board 45, wherein the solder pads 35 are connected to contact areas 47 on the circuit board 45. This allows a simple and inexpensive connection without the use of Drahtbond- connections, as these are known from the prior art.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

L'invention concerne un procédé utilisé pour produire un bloc de composants électroniques (21), notamment pour des applications haute fréquence, qui comprend au moins un composant électronique (9), fixé sur une carte de circuit (45), ainsi qu'au moins une structure de tracé conducteur (15, 25) avec laquelle le composant électronique (9) fait contact. A cet effet, le composant électronique (8) est fixé sur une couche isolante (5) de film conducteur (1). Ledit film conducteur (1) est appliqué par laminage, conjointement avec le composant électronique (9) fixé dessus, sur un support de carte de circuit (13). Une structure de tracé conducteur (15) est obtenue par structuration du film conducteur (1) et mise en contact du composant électronique (9). Des points de soudure (35) sont appliqués au niveau de connexions transversales (33), qui sont formées dans le bloc de composants électroniques (21), vont jusqu'à la face inférieure du bloc de composants électroniques (21) et sont reliées à la structure de tracé conducteur (15, 25).
EP08803865A 2007-09-19 2008-09-09 Procédé de production d'un bloc de composants électroniques et bloc de composants électroniques correspondants Withdrawn EP2193697A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102007044754A DE102007044754A1 (de) 2007-09-19 2007-09-19 Verfahren zur Herstellung einer elektronischen Baugruppe sowie elektronische Baugruppe
PCT/EP2008/061897 WO2009037145A2 (fr) 2007-09-19 2008-09-09 Procédé de production d'un bloc de composants électroniques et bloc de composants électroniques correspondants

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Publication Number Publication Date
EP2193697A2 true EP2193697A2 (fr) 2010-06-09

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EP08803865A Withdrawn EP2193697A2 (fr) 2007-09-19 2008-09-09 Procédé de production d'un bloc de composants électroniques et bloc de composants électroniques correspondants

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EP (1) EP2193697A2 (fr)
DE (1) DE102007044754A1 (fr)
WO (1) WO2009037145A2 (fr)

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DE102012012985A1 (de) 2012-06-29 2014-01-02 Karlsruher Institut für Technologie Verfahren zur Herstellung einer elektrischen Anordnung sowie elektrische Anordnung
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Publication number Publication date
WO2009037145A2 (fr) 2009-03-26
WO2009037145A3 (fr) 2009-05-28
DE102007044754A1 (de) 2009-04-09

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