EP2272090A2 - Module de circuit a substrat presentant des composants dans plusieurs plans de contact - Google Patents

Module de circuit a substrat presentant des composants dans plusieurs plans de contact

Info

Publication number
EP2272090A2
EP2272090A2 EP09737966A EP09737966A EP2272090A2 EP 2272090 A2 EP2272090 A2 EP 2272090A2 EP 09737966 A EP09737966 A EP 09737966A EP 09737966 A EP09737966 A EP 09737966A EP 2272090 A2 EP2272090 A2 EP 2272090A2
Authority
EP
European Patent Office
Prior art keywords
layer
components
substrate
component
carrier layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09737966A
Other languages
German (de)
English (en)
Inventor
Peter Kimmich
Quoc-Dat Nguyen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2272090A2 publication Critical patent/EP2272090A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
    • H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/6875—Shapes or dispositions thereof being on a metallic substrate, e.g. insulated metal substrates [IMS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path

Definitions

  • the invention is based on a circuit module in which surface-mounted electronic components are mounted on a substrate.
  • a mounting structure is known in the field of surface-mounted components (SMT).
  • the document DE 100 38 092 A1 describes an electrical assembly in which a chip is connected to a heat sink, wherein an IMS substrate provides conductor tracks to which the chip is connected.
  • a metallic base plate which forms the carrier of the substrate, is used for thermal bonding and for mechanical stabilization, it is separated from the chip via an insulating layer.
  • this document shows a connection structure that is based solely on printed circuit boards, which is separated by an insulating layer of the metallic support plate of the substrate.
  • US 6,441,520 Bl shows a power circuit using an IMS substrate (insulated metal substrate) as well.
  • the mounting unit provided on the IMS substrate comprises devices connected to an upper metal layer of the substrate.
  • the metal layer which forms conductor tracks, is separated from the carrier layer via a continuous insulation layer;
  • the metal carrier layer of the IMS substrate is thus continuously covered by an insulating layer.
  • the metal carrier layer of the IMS substrate is used only for mechanical stability and heat dissipation. Both documents show a substrate with a metal layer that continuously and completely carries an insulating layer on the contact side of the substrate.
  • IMS substrates IMS - insulated metal substrates
  • IMS substrates are used as circuit boards for power devices, whereby a metal carrier layer is provided both for heat dissipation and for increasing the mechanical stability.
  • a metal carrier layer is provided both for heat dissipation and for increasing the mechanical stability.
  • long strip conductors result because only the uppermost layer, ie the wiring layer provided on the insulating layer, which provides strip conductors, is used to connect the components. demente is used. Since, due to the flowing currents, the interconnects provided in the interconnect layer must have a minimum width, resulting in a high space requirement and at the same time long wiring paths.
  • the circuit module according to the invention and the manufacturing method according to the invention make it possible to arrange components with improved electromagnetic compatibility, reduced reactive power and reduced space requirements.
  • the invention enables a more compact construction with the aid of conventional, inexpensive substrates that can be processed with widely known processing technologies. With the present invention can be provided using conventional substrate, a further level of contact, which greatly simplifies the wiring through traces.
  • the reduced complexity leads to a reduced reactive power and to the saving of wiring area.
  • the invention leads to improved heat dissipation of power components, which are connected according to the invention.
  • the carrier layer serves as a mechanical / electrical contacting level and as a heat sink / heat dissipation. In addition, bonds and other connections, which are provided in addition to the tracks, saved.
  • the components and the associated terminals of the circuit module according to the invention can be arranged with respect to the prior art with greater degrees of freedom and greater flexibility.
  • the invention enables a combination of high power applications and control applications on the same substrate.
  • power components with control or logic components can be arranged on the same substrate. This additionally increases the integration density.
  • the invention makes it possible to establish contacts between components and substrate via a low-temperature sintered connection, such a connection leading to an increased thermal shock resistance.
  • the carrier layer of a power substrate which is made of metal for heat dissipation and to increase the mechanical stability, is used for the electrical connection of components. So far, electrical components have been completely separated from the carrier layer via a continuous insulation layer, but according to the invention a recess is provided in the insulating layer, which directly covers the carrier layer. Through this recess, a first surface of the carrier layer is exposed, and space for receiving a component and / or contact element for connecting the carrier ger harsh provided. To accommodate the component, a recess in the overlying wiring layer, usually a copper foil, is preferably also provided on the recess in the insulation layer.
  • the recess in the wiring layer is preferably aligned with the recess with the insulating layer or at least provided on one side flush with it, wherein according to a preferred embodiment of the invention, the recess in the wiring layer provides a surface into which the recess is fitted in the insulating layer , wherein a frame is formed between the larger recess in the wiring layer and the recess in the insulation layer.
  • the recesses may correspond, have the same dimensions, and be arranged one above the other in alignment.
  • a recess is to be understood as a complete recess of the insulation layer or of the wiring layer for the entire thickness of the insulation layer or wiring layer.
  • the surface of the carrier layer adjoining the insulating layer, d. H. the first surface thus forms a first contact plane that electrically connects all the components connected thereto.
  • an associated recess is provided for each component which is connected to the carrier layer in the first contact plane.
  • a second contact plane forms in a known manner the wiring layer which is provided on the insulation layer, wherein the wiring layer is preferably a metal layer which can be patterned by means of etching, for example, to form conductor tracks.
  • the circuit module according to the invention may comprise further contact planes, which are formed by further wiring layers, which are each mounted on insulating layers. Thereby, a stacked arrangement of insulating layers and wiring layers is achieved, which alternate along a direction perpendicular to the carrier layer plane.
  • the inventive use of the carrier layer of the substrate as an electrical conductor provides an additional contact plane.
  • the electrical insulation of this additional contact plane can be achieved with known insulation elements (mica disk or insulation film, insulating bush, etc.).
  • a three-layered IMS substrate with a metallic carrier layer, an insulating layer and a wiring layer is used.
  • a substrate having a metal carrier layer and in each case two mutually alternating insulation layers or wiring layers is used, wherein one of the insulation layers separates one of the wiring layers from the carrier layer.
  • Both embodiments may further comprise solder resist applied as a layer to the wiring layer and the top wiring layer, respectively.
  • the solder mask can also be applied to other surfaces be, for example, on an insulating layer, over which a recess of the wiring layer is provided, or on the carrier layer, which is exposed by recesses.

Landscapes

  • Structure Of Printed Boards (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

L'invention concerne un module de circuit présentant des composants fixés sur un substrat (10). Le substrat (10) comprend une couche support (20) en métal présentant une première surface sur laquelle est placée une première couche isolante (30) directement adjacente à la couche support (20). Le substrat comprend également une première couche de câblage (40) directement adjacente à la première couche isolante (30), électroconductrice et placée sur la première couche isolante (30). Le substrat (10) comprend un premier plan de contact qui s'étend le long de la première surface, au moins l'un des composants dans le premier plan de contact étant directement relié électriquement à la couche support (20). L'invention concerne également un procédé de production d'un module de circuit selon l'invention, selon lequel on retire un segment de surface de la couche de câblage (40) et un segment de surface de la couche isolante (30) sous-jacente et on place un composant dans l'évidement ainsi réalisé.
EP09737966A 2008-04-28 2009-04-02 Module de circuit a substrat presentant des composants dans plusieurs plans de contact Withdrawn EP2272090A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE200810001414 DE102008001414A1 (de) 2008-04-28 2008-04-28 Substrat-Schaltungsmodul mit Bauteilen in mehreren Kontaktierungsebenen
PCT/EP2009/053914 WO2009132922A2 (fr) 2008-04-28 2009-04-02 Module de circuit à substrat présentant des composants dans plusieurs plans de contact

Publications (1)

Publication Number Publication Date
EP2272090A2 true EP2272090A2 (fr) 2011-01-12

Family

ID=40718836

Family Applications (1)

Application Number Title Priority Date Filing Date
EP09737966A Withdrawn EP2272090A2 (fr) 2008-04-28 2009-04-02 Module de circuit a substrat presentant des composants dans plusieurs plans de contact

Country Status (5)

Country Link
US (1) US20110100681A1 (fr)
EP (1) EP2272090A2 (fr)
CN (1) CN102017135B (fr)
DE (1) DE102008001414A1 (fr)
WO (1) WO2009132922A2 (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7847375B2 (en) 2008-08-05 2010-12-07 Infineon Technologies Ag Electronic device and method of manufacturing same
DE102010034143A1 (de) 2010-08-12 2012-02-16 Thomas Hofmann Träger für elektronische und elektrische Bauelemente
JP5579234B2 (ja) * 2012-08-30 2014-08-27 三菱電機株式会社 電子回路部品の冷却構造及びそれを用いたインバータ装置
US8872328B2 (en) 2012-12-19 2014-10-28 General Electric Company Integrated power module package
DE102013214899B4 (de) 2013-07-30 2023-11-16 Valeo Eautomotive Germany Gmbh Leistungselektronikanordnung
JP2015076442A (ja) * 2013-10-07 2015-04-20 ローム株式会社 パワーモジュールおよびその製造方法
DE102014000126A1 (de) 2014-01-13 2015-07-16 Auto-Kabel Management Gmbh Leiterplatte, Schaltung und Verfahren zur Herstellung einer Schaltung
EP3018710B1 (fr) * 2014-11-10 2020-08-05 Nxp B.V. Assemblage des puces semi-conductrices
CN108702856B (zh) * 2016-03-10 2020-02-21 株式会社自动网络技术研究所 电路构成体
TWI650843B (zh) * 2016-04-29 2019-02-11 台達電子工業股份有限公司 基板、功率模組封裝、及圖案化的絕緣金屬基板之製造方法
US9960127B2 (en) 2016-05-18 2018-05-01 Macom Technology Solutions Holdings, Inc. High-power amplifier package
US10134658B2 (en) 2016-08-10 2018-11-20 Macom Technology Solutions Holdings, Inc. High power transistors
JP6769646B2 (ja) * 2016-11-22 2020-10-14 住友電工デバイス・イノベーション株式会社 半導体装置
JP2018195717A (ja) * 2017-05-17 2018-12-06 富士電機株式会社 半導体モジュール、半導体モジュールのベース板および半導体装置の製造方法
JP6852649B2 (ja) * 2017-10-24 2021-03-31 株式会社オートネットワーク技術研究所 回路構成体及び回路構成体の製造方法
EP3629687A1 (fr) * 2018-09-26 2020-04-01 Siemens Aktiengesellschaft Procédé permettant un montage d'un appareil électrique
CN111341750B (zh) * 2018-12-19 2024-03-01 奥特斯奥地利科技与系统技术有限公司 包括有导电基部结构的部件承载件及制造方法
CN114927485A (zh) * 2022-04-29 2022-08-19 杭州阔博科技有限公司 一种元器件的导电储热传热方法
TWI856865B (zh) * 2022-09-29 2024-09-21 璦司柏電子股份有限公司 內埋式具有陶瓷基板及功率電晶體的熱電分離電路板
TWI856380B (zh) * 2022-09-29 2024-09-21 璦司柏電子股份有限公司 內埋式具有陶瓷基板及功率電晶體的熱電分離電路板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5328079A (en) * 1993-03-19 1994-07-12 National Semiconductor Corporation Method of and arrangement for bond wire connecting together certain integrated circuit components
WO1995010853A1 (fr) * 1993-10-12 1995-04-20 Olin Corporation Boitier metallique connectable aux extremites
DE19714470A1 (de) * 1996-06-07 1997-12-11 Hewlett Packard Co Drahtbondchipverbindung mit hoher Dichte für Multichip-Module
US20020149102A1 (en) * 2000-11-15 2002-10-17 Conexant Systems, Inc. Structure and method for fabrication of a leadless multi-die carrier
DE102004027186B3 (de) * 2004-06-03 2005-10-20 Eupec Gmbh & Co Kg Steuerkreis für ein elektrisches Modul
US20050287701A1 (en) * 2004-06-29 2005-12-29 Advanced Semiconductor Engineering, Inc. Leadframe for a multi-chip package and method for manufacturing the same

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4993148A (en) * 1987-05-19 1991-02-19 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a circuit board
JPH0812801B2 (ja) * 1988-01-11 1996-02-07 株式会社日立製作所 ハイブリットｉｃ用基板とそれを用いたハイブリットｉｃ及びその装置
KR100307465B1 (ko) * 1992-10-20 2001-12-15 야기 추구오 파워모듈
JP3051011B2 (ja) * 1993-11-18 2000-06-12 株式会社東芝 パワ−モジュ−ル
JPH0955459A (ja) * 1995-06-06 1997-02-25 Seiko Epson Corp 半導体装置
JP3540471B2 (ja) * 1995-11-30 2004-07-07 三菱電機株式会社 半導体モジュール
US6323549B1 (en) * 1996-08-29 2001-11-27 L. Pierre deRochemont Ceramic composite wiring structures for semiconductor devices and method of manufacture
WO1998030072A1 (fr) * 1996-12-30 1998-07-09 Derochemont L Pierre Doing Bus Structures de cablage composites en ceramique pour dispositifs a semi-conducteur et procedes de fabrication
US6166464A (en) 1998-08-24 2000-12-26 International Rectifier Corp. Power module
US5999415A (en) * 1998-11-18 1999-12-07 Vlsi Technology, Inc. BGA package using PCB and tape in a die-down configuration
FR2801763B1 (fr) * 1999-11-30 2002-02-15 Sagem Module electronique de puissance et procede de fabrication d'un tel module
DE10038092A1 (de) 2000-08-04 2002-02-14 Bosch Gmbh Robert Verfahren zur elektrischen Verbindung eines Halbleiterbauelements mit einer elektrischen Baugruppe
JP4756200B2 (ja) * 2000-09-04 2011-08-24 Ｄｏｗａメタルテック株式会社 金属セラミックス回路基板
KR100432715B1 (ko) * 2001-07-18 2004-05-24 엘지전자 주식회사 방열부재를 갖는 인쇄회로기판 및 그 제조방법
US6633005B2 (en) * 2001-10-22 2003-10-14 Micro Mobio Corporation Multilayer RF amplifier module
US7745930B2 (en) * 2005-04-25 2010-06-29 International Rectifier Corporation Semiconductor device packages with substrates for redistributing semiconductor device electrodes
JP2007158279A (ja) * 2005-12-09 2007-06-21 Hitachi Ltd 半導体装置及びそれを用いた電子制御装置
JP2007305962A (ja) * 2006-05-12 2007-11-22 Honda Motor Co Ltd パワー半導体モジュール

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5328079A (en) * 1993-03-19 1994-07-12 National Semiconductor Corporation Method of and arrangement for bond wire connecting together certain integrated circuit components
WO1995010853A1 (fr) * 1993-10-12 1995-04-20 Olin Corporation Boitier metallique connectable aux extremites
DE19714470A1 (de) * 1996-06-07 1997-12-11 Hewlett Packard Co Drahtbondchipverbindung mit hoher Dichte für Multichip-Module
US20020149102A1 (en) * 2000-11-15 2002-10-17 Conexant Systems, Inc. Structure and method for fabrication of a leadless multi-die carrier
DE102004027186B3 (de) * 2004-06-03 2005-10-20 Eupec Gmbh & Co Kg Steuerkreis für ein elektrisches Modul
US20050287701A1 (en) * 2004-06-29 2005-12-29 Advanced Semiconductor Engineering, Inc. Leadframe for a multi-chip package and method for manufacturing the same

Also Published As

Publication number Publication date
WO2009132922A3 (fr) 2009-12-30
DE102008001414A1 (de) 2009-10-29
WO2009132922A2 (fr) 2009-11-05
US20110100681A1 (en) 2011-05-05
CN102017135A (zh) 2011-04-13
CN102017135B (zh) 2014-08-06

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