EP2654387A3 - Leiterplatte - Google Patents

Leiterplatte Download PDF

Info

Publication number
EP2654387A3
EP2654387A3 EP13162056.9A EP13162056A EP2654387A3 EP 2654387 A3 EP2654387 A3 EP 2654387A3 EP 13162056 A EP13162056 A EP 13162056A EP 2654387 A3 EP2654387 A3 EP 2654387A3
Authority
EP
European Patent Office
Prior art keywords
semiconductor package
surface layer
circumference side
signal terminal
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP13162056.9A
Other languages
English (en)
French (fr)
Other versions
EP2654387A2 (de
EP2654387B1 (de
Inventor
Hiroshi Isono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of EP2654387A2 publication Critical patent/EP2654387A2/de
Publication of EP2654387A3 publication Critical patent/EP2654387A3/de
Application granted granted Critical
Publication of EP2654387B1 publication Critical patent/EP2654387B1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0243—Printed circuits associated with mounted high frequency components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0228—Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10545—Related components mounted on both sides of the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H10W70/655—Fan-out layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/823—Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Waveguides (AREA)
EP13162056.9A 2012-04-19 2013-04-03 Leiterplatte Active EP2654387B1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012096100A JP6452270B2 (ja) 2012-04-19 2012-04-19 プリント回路板および電子機器

Publications (3)

Publication Number Publication Date
EP2654387A2 EP2654387A2 (de) 2013-10-23
EP2654387A3 true EP2654387A3 (de) 2017-07-19
EP2654387B1 EP2654387B1 (de) 2021-08-11

Family

ID=48013865

Family Applications (1)

Application Number Title Priority Date Filing Date
EP13162056.9A Active EP2654387B1 (de) 2012-04-19 2013-04-03 Leiterplatte

Country Status (4)

Country Link
US (2) US9185804B2 (de)
EP (1) EP2654387B1 (de)
JP (1) JP6452270B2 (de)
CN (1) CN103379737B (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140162568A1 (en) * 2012-12-07 2014-06-12 Anayas360.Com, Llc On-chip calibration and built-in-self-test for soc millimeter-wave integrated digital radio and modem
EP2869339B1 (de) * 2013-10-31 2016-07-27 Ampleon Netherlands B.V. Transistoranordnung
WO2017131694A1 (en) * 2016-01-28 2017-08-03 Hewlett Packard Enterprise Development Lp Printed circuit boards
CN108463048B (zh) * 2017-02-21 2022-04-15 拉碧斯半导体株式会社 基板电路装置
US10074919B1 (en) * 2017-06-16 2018-09-11 Intel Corporation Board integrated interconnect
KR102420586B1 (ko) 2017-07-24 2022-07-13 삼성전자주식회사 반도체 장치, 반도체 패키지 및 반도체 패키지의 제조 방법
WO2019075224A1 (en) * 2017-10-11 2019-04-18 Nucleus Scientific, Inc. MODULAR BUS SYSTEMS FOR ELECTRIC VEHICLES
CN108925035A (zh) * 2018-08-01 2018-11-30 郑州云海信息技术有限公司 一种基于0402封装的印刷电路板封装设计方法及系统
US11234325B2 (en) * 2019-06-20 2022-01-25 Infinera Corporation Printed circuit board having a differential pair routing topology with negative plane routing and impedance correction structures
JP2021034536A (ja) * 2019-08-23 2021-03-01 日本特殊陶業株式会社 配線基板
US11350526B2 (en) * 2019-09-27 2022-05-31 Ge Aviation Systems, Llc Reversible electronic card and method of implementation thereof
JP7235708B2 (ja) * 2020-10-14 2023-03-08 矢崎総業株式会社 熱伝導シートの製造方法
DE102021202801B4 (de) * 2021-03-23 2022-10-13 Hanon Systems Efp Deutschland Gmbh Schaltung mit einer Leiterplatte und Fahrzeug mit zumindest einer derartigen Schaltung
JP7840675B2 (ja) * 2021-12-13 2026-04-06 キヤノン株式会社 電子モジュール及び電子機器
CN116744544A (zh) * 2023-07-03 2023-09-12 海光信息技术股份有限公司 一种印制电路板及处理器板卡

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6008534A (en) * 1998-01-14 1999-12-28 Lsi Logic Corporation Integrated circuit package having signal traces interposed between power and ground conductors in order to form stripline transmission lines
US6353539B1 (en) * 1998-07-21 2002-03-05 Intel Corporation Method and apparatus for matched length routing of back-to-back package placement
US20090032921A1 (en) * 2007-07-31 2009-02-05 Kabushiki Kaisha Toshiba Printed wiring board structure and electronic apparatus

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08340161A (ja) 1995-06-13 1996-12-24 Canon Inc プリント配線基板上のバス配線
US5763947A (en) * 1996-01-31 1998-06-09 International Business Machines Corporation Integrated circuit chip package having configurable contacts and a removable connector
US5898217A (en) * 1998-01-05 1999-04-27 Motorola, Inc. Semiconductor device including a substrate having clustered interconnects
JP3495917B2 (ja) * 1998-07-15 2004-02-09 日本特殊陶業株式会社 多層配線基板
JP2000323645A (ja) 1999-05-11 2000-11-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP2001035966A (ja) 2000-01-01 2001-02-09 Ngk Spark Plug Co Ltd 配線基板および中継基板
KR100455890B1 (ko) * 2002-12-24 2004-11-06 삼성전기주식회사 커패시터 내장형 인쇄회로기판 및 그 제조 방법
JP4137659B2 (ja) 2003-02-13 2008-08-20 新光電気工業株式会社 電子部品実装構造及びその製造方法
JP2005191355A (ja) * 2003-12-26 2005-07-14 Toshiba Corp モジュール基板
EP1754398A4 (de) * 2004-05-15 2010-03-24 Stablcor Inc Leiterplatte mit leitendem stützkern mit harzgefüllten kanälen
CN100367491C (zh) 2004-05-28 2008-02-06 日本特殊陶业株式会社 中间基板
JP4273098B2 (ja) * 2004-09-07 2009-06-03 キヤノン株式会社 多層プリント回路板
DE102005033254B4 (de) * 2005-07-15 2008-03-27 Qimonda Ag Verfahren zur Herstellung eines Chip-Trägersubstrats aus Silizium mit durchgehenden Kontakten
DE102005037040A1 (de) * 2005-08-05 2007-02-08 Epcos Ag Elektrisches Bauelement
JP2008109094A (ja) * 2006-09-29 2008-05-08 Sanyo Electric Co Ltd 素子搭載用基板および半導体モジュール
JP4978269B2 (ja) * 2007-03-27 2012-07-18 日本電気株式会社 多層配線基板
JP5201206B2 (ja) * 2008-03-28 2013-06-05 日本電気株式会社 多層プリント配線基板
JP2010010482A (ja) * 2008-06-27 2010-01-14 Canon Inc 差動伝送回路
CN101631425B (zh) * 2008-07-15 2012-08-29 鸿富锦精密工业（深圳）有限公司 电路板及其共存布线方法
US8488329B2 (en) * 2010-05-10 2013-07-16 International Business Machines Corporation Power and ground vias for power distribution systems
CN102348323A (zh) * 2010-08-02 2012-02-08 鸿富锦精密工业（深圳）有限公司 电路板

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6008534A (en) * 1998-01-14 1999-12-28 Lsi Logic Corporation Integrated circuit package having signal traces interposed between power and ground conductors in order to form stripline transmission lines
US6353539B1 (en) * 1998-07-21 2002-03-05 Intel Corporation Method and apparatus for matched length routing of back-to-back package placement
US20090032921A1 (en) * 2007-07-31 2009-02-05 Kabushiki Kaisha Toshiba Printed wiring board structure and electronic apparatus

Also Published As

Publication number Publication date
US20130279135A1 (en) 2013-10-24
JP6452270B2 (ja) 2019-01-16
CN103379737A (zh) 2013-10-30
EP2654387A2 (de) 2013-10-23
EP2654387B1 (de) 2021-08-11
JP2013225544A (ja) 2013-10-31
US20160007466A1 (en) 2016-01-07
CN103379737B (zh) 2016-03-02
US9345140B2 (en) 2016-05-17
US9185804B2 (en) 2015-11-10

Similar Documents

Publication Publication Date Title
EP2654387A3 (de) Leiterplatte
EP3799118A3 (de) Auf masse gelegtes via clustering zur übersprechverminderung
EP2876985A3 (de) Stromwandlungsvorrichtung und Stromwandlungsanordnung
EP2866257A3 (de) Leiterplatte und Herstellungsverfahren dafür und Hableitergehäuse damit
EP2706829A3 (de) Leiterplatte, Leiterplatte, und Verfahren zur Herstellung einer Leiterplatte
EP2779810A3 (de) Leiterplattenverpackungsstruktur und Herstellungsverfahren dafür
MY163911A (en) Leadless integrated circuit package having high density contacts
TW201130102A (en) Semiconductor device and method for forming the same
WO2011014287A3 (en) Low cost, high strength electronics module for airborne object
EP2571051A3 (de) Leistungsüberlagerungsstruktur mit Leiterrahmenverbindungen
IN2012DN03251A (de)
EP2423948A3 (de) Seitliche Verbindung für einen Dünnfilmwiderstand ohne Kontaktlöcher und Herstellungsverfahren dafür
EP2503861A3 (de) Bestückte Leiterplatte für ein tragbares Endgerät und Verfahren zu deren Herstellung
EP3252812A3 (de) Eingebettete verpackungsstruktur
WO2012009588A3 (en) Integrated shielding for a package-on-package system
WO2013085071A3 (en) Printed circuit board
JP2012129443A5 (de)
EP2651199A3 (de) Leiterplatte
EP3503226A3 (de) Halbleitergehäusestruktur
ITMI20111846A1 (it) Procedimento per produrre un circuito elettrico e circuito elettrico
MY188109A (en) Electronic component
EP2741326A3 (de) Abschirmung des Siliziums von externen RF-Interferenzen
EP2669944A3 (de) Halbleitergehäuse und gestapeltes Halbleiterpaket
EP2930742A3 (de) Halbleitervorrichtung und elektronische Schaltvorrichtung
EP2922091A3 (de) Leitungsloser Chipträger

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

RIC1 Information provided on ipc code assigned before grant

Ipc: H05K 1/02 20060101AFI20170612BHEP

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20180119

RBV Designated contracting states (corrected)

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

17Q First examination report despatched

Effective date: 20181015

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

INTG Intention to grant announced

Effective date: 20210224

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE PATENT HAS BEEN GRANTED

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602013078724

Country of ref document: DE

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

Ref country code: AT

Ref legal event code: REF

Ref document number: 1420753

Country of ref document: AT

Kind code of ref document: T

Effective date: 20210915

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG9D

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20210811

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 1420753

Country of ref document: AT

Kind code of ref document: T

Effective date: 20210811

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20211111

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20211111

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20211213

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20211112

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602013078724

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20220512

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20220403

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20220430

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220403

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220430

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220403

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220430

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220430

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220430

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220403

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20130403

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20250319

Year of fee payment: 13

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210811