EP2770449A4 - Dispositif de conception de système multi-carte, procédé de conception de système multi-carte, programme et support d'enregistrement lisible par ordinateur - Google Patents

Dispositif de conception de système multi-carte, procédé de conception de système multi-carte, programme et support d'enregistrement lisible par ordinateur

Info

Publication number
EP2770449A4
EP2770449A4 EP12842256.5A EP12842256A EP2770449A4 EP 2770449 A4 EP2770449 A4 EP 2770449A4 EP 12842256 A EP12842256 A EP 12842256A EP 2770449 A4 EP2770449 A4 EP 2770449A4
Authority
EP
European Patent Office
Prior art keywords
system design
card system
program
recording medium
computer readable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP12842256.5A
Other languages
German (de)
English (en)
Other versions
EP2770449A1 (fr
Inventor
Ryouta Satou
Takahiko Maehashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zuken Inc
Original Assignee
Zuken Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zuken Inc filed Critical Zuken Inc
Publication of EP2770449A1 publication Critical patent/EP2770449A1/fr
Publication of EP2770449A4 publication Critical patent/EP2770449A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/31—Design entry, e.g. editors specifically adapted for circuit design
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00—Details relating to CAD techniques
    • G06F2111/02—CAD in a network environment, e.g. collaborative CAD or distributed simulation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Supply And Installment Of Electrical Components (AREA)
  • User Interface Of Digital Computer (AREA)
  • Architecture (AREA)
  • Software Systems (AREA)
  • Processing Or Creating Images (AREA)
EP12842256.5A 2011-10-20 2012-10-02 Dispositif de conception de système multi-carte, procédé de conception de système multi-carte, programme et support d'enregistrement lisible par ordinateur Withdrawn EP2770449A4 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011230415 2011-10-20
PCT/JP2012/075457 WO2013058095A1 (fr) 2011-10-20 2012-10-02 Dispositif de conception de système multi-carte, procédé de conception de système multi-carte, programme et support d'enregistrement lisible par ordinateur

Publications (2)

Publication Number Publication Date
EP2770449A1 EP2770449A1 (fr) 2014-08-27
EP2770449A4 true EP2770449A4 (fr) 2015-10-21

Family

ID=48140747

Family Applications (1)

Application Number Title Priority Date Filing Date
EP12842256.5A Withdrawn EP2770449A4 (fr) 2011-10-20 2012-10-02 Dispositif de conception de système multi-carte, procédé de conception de système multi-carte, programme et support d'enregistrement lisible par ordinateur

Country Status (4)

Country Link
US (1) US9047435B2 (fr)
EP (1) EP2770449A4 (fr)
JP (1) JP5989655B2 (fr)
WO (1) WO2013058095A1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5874339B2 (ja) * 2011-11-18 2016-03-02 富士通株式会社 回路設計プログラム、回路設計方法、および回路設計装置
JP6324708B2 (ja) * 2013-11-22 2018-05-16 株式会社図研 並行編集システム、並行編集方法、プログラムおよびメモリ媒体
US9734273B2 (en) * 2014-05-27 2017-08-15 Mentor Graphics Corporation System design management
US9280621B1 (en) 2014-08-05 2016-03-08 Cadence Design Systems, Inc. Methods, systems, and articles of manufacture for analyzing a multi-fabric electronic design and displaying analysis results for the multi-fabric electronic design spanning and displaying simulation results across multiple design fabrics
JP6402599B2 (ja) * 2014-11-13 2018-10-10 富士通株式会社 情報処理装置、設計支援方法、及び設計支援プログラム
US9881119B1 (en) 2015-06-29 2018-01-30 Cadence Design Systems, Inc. Methods, systems, and computer program product for constructing a simulation schematic of an electronic design across multiple design fabrics
US9881120B1 (en) 2015-09-30 2018-01-30 Cadence Design Systems, Inc. Method, system, and computer program product for implementing a multi-fabric mixed-signal design spanning across multiple design fabrics with electrical and thermal analysis awareness
US9934354B1 (en) 2016-06-30 2018-04-03 Cadence Design Systems, Inc. Methods, systems, and computer program product for implementing a layout-driven, multi-fabric schematic design
JP6766541B2 (ja) * 2016-09-13 2020-10-14 富士通株式会社 操作制御プログラム、操作制御方法および情報処理装置
JP6252651B1 (ja) * 2016-10-19 2017-12-27 富士ゼロックス株式会社 三次元形状データの編集装置、三次元形状データの編集プログラム、及び三次元形状データのデータ構造
JP2018067289A (ja) * 2017-05-11 2018-04-26 富士ゼロックス株式会社 三次元形状データの編集装置、三次元形状データの編集プログラム、及び三次元形状データのデータ構造
US12475282B1 (en) * 2022-09-21 2025-11-18 Cadence Design Systems, Inc. Cross-querying between distributed interactive applications

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030023944A1 (en) * 2001-07-24 2003-01-30 Erickson Michael John Method for ensuring correct pin assignments between system board connections using common mapping files
CN1584890A (zh) * 2003-08-19 2005-02-23 惠普开发有限公司 确保电路设计之间的正确连通性的系统和方法
US20090326874A1 (en) * 2006-10-11 2009-12-31 Zuken Inc. Designing support method, designing support equipment, program and computer-readable storage medium

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0327474A (ja) * 1989-06-23 1991-02-05 Dainippon Printing Co Ltd 半導体集積回路用ネットリストの修正方法
US5295081A (en) * 1992-10-30 1994-03-15 International Business Machines Corporation Concurrent interactive wire editing
US5691913A (en) * 1994-03-28 1997-11-25 Matsushita Electric Ind. Co. Layout designing apparatus for circuit boards
US5633804A (en) * 1994-12-19 1997-05-27 Motorola, Inc. Method for automatically producing printed wiring board fabrication drawings
JPH08227428A (ja) * 1995-02-20 1996-09-03 Matsushita Electric Ind Co Ltd プリント基板ｃａｄ装置
US6205579B1 (en) * 1996-10-28 2001-03-20 Altera Corporation Method for providing remote software technical support
US6651225B1 (en) * 1997-05-02 2003-11-18 Axis Systems, Inc. Dynamic evaluation logic system and method
US6691296B1 (en) * 1998-02-02 2004-02-10 Matsushita Electric Industrial Co., Ltd. Circuit board design aiding
US7480606B2 (en) * 1998-08-31 2009-01-20 Versity Design, Inc. VCD-on-demand system and method
US6587989B2 (en) * 2001-09-14 2003-07-01 Ampro Computers, Inc. PCB/complex electronic subsystem model
US7516435B2 (en) * 2001-12-10 2009-04-07 Mentor Graphics Corporation Reservation of design elements in a parallel printed circuit board design environment
WO2003050726A1 (fr) * 2001-12-10 2003-06-19 Mentor Graphics Corporation Conception electronique automatisee realisee en parallele: modification simultanee partagee
US6708313B2 (en) * 2001-12-10 2004-03-16 Charles Pfeil Parallel electronic design automation: shared simultaneous editing
US7587695B2 (en) * 2001-12-10 2009-09-08 Mentor Graphics Corporation Protection boundaries in a parallel printed circuit board design environment
US6711718B2 (en) 2001-12-10 2004-03-23 Charles Pfeil Parallel electronic design automation: distributed simultaneous editing
JP2003256490A (ja) * 2002-03-06 2003-09-12 Ricoh Co Ltd 回路図階層組替装置、および回路図階層組替プログラム
US7017140B2 (en) * 2002-08-29 2006-03-21 Bae Systems Information And Electronic Systems Integration Inc. Common components in interface framework for developing field programmable based applications independent of target circuit board
US7265300B2 (en) * 2003-03-21 2007-09-04 Commscope Solutions Properties, Llc Next high frequency improvement using hybrid substrates of two materials with different dielectric constant frequency slopes
US7546571B2 (en) * 2004-09-08 2009-06-09 Mentor Graphics Corporation Distributed electronic design automation environment
US20060101368A1 (en) * 2004-09-08 2006-05-11 Mentor Graphics Corporation Distributed electronic design automation environment
US20060212838A1 (en) * 2005-02-09 2006-09-21 Checksum, Llc System and apparatus for in-system programming
JP4472562B2 (ja) * 2005-03-11 2010-06-02 株式会社図研 プリント基板の設計方法、プリント基板の設計システム、プログラムおよびコンピューター読み取り可能な記録媒体
JP4448466B2 (ja) * 2005-03-17 2010-04-07 富士通株式会社 論理回路設計方法、論理回路設計プログラム及び論理回路設計装置
US8516418B2 (en) * 2006-06-30 2013-08-20 Oracle America, Inc. Application of a relational database in integrated circuit design
US8762927B2 (en) 2006-10-11 2014-06-24 Zuken Inc. Processing method of electric information in CAD system, processing device of electric information in CAD system, program and computer-readable storage medium
US8185849B2 (en) * 2006-10-11 2012-05-22 Zuken Inc. Electric information processing method in CAD system, device thereof, program, and computer readable storage medium
US20080301600A1 (en) * 2006-12-07 2008-12-04 Fujitsu Limited CAD apparatus and check support apparatus
US20080141194A1 (en) * 2006-12-07 2008-06-12 Fujitsu Limited Check support apparatus, method, and computer product
US8373664B2 (en) * 2006-12-18 2013-02-12 Cypress Semiconductor Corporation Two circuit board touch-sensor device
US7847567B2 (en) * 2007-04-10 2010-12-07 Seagate Technology Llc Verifying a printed circuit board manufacturing process prior to electrical intercoupling
US8214192B2 (en) * 2008-02-27 2012-07-03 Mentor Graphics Corporation Resource remapping in a hardware emulation environment
JP5569390B2 (ja) * 2008-03-13 2014-08-13 株式会社ニコン 半導体装置の設計システム、半導体装置の製造方法および基板貼り合わせ装置
JP5175623B2 (ja) * 2008-05-30 2013-04-03 株式会社図研 システム回路図設計装置、システム回路図設計方法、プログラムおよびコンピュータ読み取り可能な記録媒体
US8516399B2 (en) * 2009-02-18 2013-08-20 Mentor Graphics Corporation Collaborative environment for physical verification of microdevice designs
US7896692B2 (en) * 2009-05-15 2011-03-01 Leviton Manufacturing Co., Inc. Method of improving isolation between circuits on a printed circuit board
US8839179B2 (en) * 2010-02-12 2014-09-16 Synopsys Taiwan Co., LTD. Prototype and emulation system for multiple custom prototype boards

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030023944A1 (en) * 2001-07-24 2003-01-30 Erickson Michael John Method for ensuring correct pin assignments between system board connections using common mapping files
CN1584890A (zh) * 2003-08-19 2005-02-23 惠普开发有限公司 确保电路设计之间的正确连通性的系统和方法
US20090326874A1 (en) * 2006-10-11 2009-12-31 Zuken Inc. Designing support method, designing support equipment, program and computer-readable storage medium

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2013058095A1 *

Also Published As

Publication number Publication date
WO2013058095A1 (fr) 2013-04-25
JP5989655B2 (ja) 2016-09-07
US20140223402A1 (en) 2014-08-07
EP2770449A1 (fr) 2014-08-27
JPWO2013058095A1 (ja) 2015-04-02
US9047435B2 (en) 2015-06-02

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