EP2943979A4 - Halbleiterbauelement mit merkmalen zur verhinderung von reverse-engineering - Google Patents

Halbleiterbauelement mit merkmalen zur verhinderung von reverse-engineering Download PDF

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Publication number
EP2943979A4
EP2943979A4 EP14737723.8A EP14737723A EP2943979A4 EP 2943979 A4 EP2943979 A4 EP 2943979A4 EP 14737723 A EP14737723 A EP 14737723A EP 2943979 A4 EP2943979 A4 EP 2943979A4
Authority
EP
European Patent Office
Prior art keywords
features
semiconductor device
reverse engineering
prevent reverse
engineering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP14737723.8A
Other languages
English (en)
French (fr)
Other versions
EP2943979A1 (de
Inventor
William Eli Thacker
Robert Francis TENCZAR
Michael Clinton HOKE
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Verisiti Inc
Original Assignee
Verisiti Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/739,401 external-priority patent/US20130320491A1/en
Application filed by Verisiti Inc filed Critical Verisiti Inc
Publication of EP2943979A1 publication Critical patent/EP2943979A1/de
Publication of EP2943979A4 publication Critical patent/EP2943979A4/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/40Arrangements for protection of devices protecting against tampering, e.g. unauthorised inspection or reverse engineering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
EP14737723.8A 2013-01-11 2014-01-03 Halbleiterbauelement mit merkmalen zur verhinderung von reverse-engineering Withdrawn EP2943979A4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/739,401 US20130320491A1 (en) 2011-06-07 2013-01-11 Semiconductor Device Having Features to Prevent Reverse Engineering
PCT/US2014/010185 WO2014109961A1 (en) 2013-01-11 2014-01-03 Semiconductor device having features to prevent reverse engineering

Publications (2)

Publication Number Publication Date
EP2943979A1 EP2943979A1 (de) 2015-11-18
EP2943979A4 true EP2943979A4 (de) 2017-05-17

Family

ID=51167305

Family Applications (1)

Application Number Title Priority Date Filing Date
EP14737723.8A Withdrawn EP2943979A4 (de) 2013-01-11 2014-01-03 Halbleiterbauelement mit merkmalen zur verhinderung von reverse-engineering

Country Status (7)

Country Link
EP (1) EP2943979A4 (de)
CN (1) CN104969345B (de)
AP (1) AP2015008585A0 (de)
CA (1) CA2897082A1 (de)
EA (1) EA201591224A1 (de)
MX (2) MX374662B (de)
WO (1) WO2014109961A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7109755B2 (ja) * 2018-02-15 2022-08-01 株式会社吉川システック 半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100001403A1 (en) * 2008-07-03 2010-01-07 Nec Electronics Corporation Method for designing semiconductor integrated circuit which includes metallic wiring connected to gate electrode and satisfies antenna criterion

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4766516A (en) * 1987-09-24 1988-08-23 Hughes Aircraft Company Method and apparatus for securing integrated circuits from unauthorized copying and use
US4933898A (en) * 1989-01-12 1990-06-12 General Instrument Corporation Secure integrated circuit chip with conductive shield
US5783846A (en) * 1995-09-22 1998-07-21 Hughes Electronics Corporation Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering
US20020096744A1 (en) * 2001-01-24 2002-07-25 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using etched passivation openings in integrated circuits
US7135734B2 (en) * 2001-08-30 2006-11-14 Micron Technology, Inc. Graded composition metal oxide tunnel barrier interpoly insulators
US20120313664A1 (en) * 2011-06-07 2012-12-13 Static Control Components, Inc. Semiconductor Device Having Features to Prevent Reverse Engineering

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100001403A1 (en) * 2008-07-03 2010-01-07 Nec Electronics Corporation Method for designing semiconductor integrated circuit which includes metallic wiring connected to gate electrode and satisfies antenna criterion

Also Published As

Publication number Publication date
AP2015008585A0 (en) 2015-07-31
WO2014109961A1 (en) 2014-07-17
MX348002B (es) 2017-01-05
EA201591224A1 (ru) 2016-02-29
EP2943979A1 (de) 2015-11-18
MX374662B (es) 2025-03-06
CA2897082A1 (en) 2014-07-17
MX2015008948A (es) 2015-09-28
CN104969345B (zh) 2018-12-07
CN104969345A (zh) 2015-10-07

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