EP3149741A4 - Verfahren zur speicherung und aktualisierung von daten in einem thyristor-direktzugriffsspeicher - Google Patents

Verfahren zur speicherung und aktualisierung von daten in einem thyristor-direktzugriffsspeicher Download PDF

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Publication number
EP3149741A4
EP3149741A4 EP15844478.6A EP15844478A EP3149741A4 EP 3149741 A4 EP3149741 A4 EP 3149741A4 EP 15844478 A EP15844478 A EP 15844478A EP 3149741 A4 EP3149741 A4 EP 3149741A4
Authority
EP
European Patent Office
Prior art keywords
retaining
methods
random access
access memory
refreshing data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP15844478.6A
Other languages
English (en)
French (fr)
Other versions
EP3149741A1 (de
Inventor
Harry Luan
Bruce Bateman
Valery Axelrad
Charlie Cheng
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kilopass Technology Inc
Original Assignee
Kilopass Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/590,834 external-priority patent/US9449669B2/en
Application filed by Kilopass Technology Inc filed Critical Kilopass Technology Inc
Publication of EP3149741A1 publication Critical patent/EP3149741A1/de
Publication of EP3149741A4 publication Critical patent/EP3149741A4/de
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/39—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using thyristors or the avalanche or negative resistance type, e.g. PNPN, SCR, SCS, UJT
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4026—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using bipolar transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/4067—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the bipolar type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/10—DRAM devices comprising bipolar components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00—Thyristors
    • H10D18/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/01—Manufacture or treatment
    • H10D8/041—Manufacture or treatment of multilayer diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/80—PNPN diodes, e.g. Shockley diodes or break-over diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
EP15844478.6A 2014-09-25 2015-09-25 Verfahren zur speicherung und aktualisierung von daten in einem thyristor-direktzugriffsspeicher Withdrawn EP3149741A4 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201462055582P 2014-09-25 2014-09-25
US14/590,834 US9449669B2 (en) 2014-09-25 2015-01-06 Cross-coupled thyristor SRAM circuits and methods of operation
US201562186336P 2015-06-29 2015-06-29
PCT/US2015/052505 WO2016049606A1 (en) 2014-09-25 2015-09-25 Methods of retaining and refreshing data in a thyristor random access memory

Publications (2)

Publication Number Publication Date
EP3149741A1 EP3149741A1 (de) 2017-04-05
EP3149741A4 true EP3149741A4 (de) 2018-01-17

Family

ID=55582136

Family Applications (3)

Application Number Title Priority Date Filing Date
EP15845023.9A Withdrawn EP3149740A4 (de) 2014-09-25 2015-09-25 Flüchtiger thyristor-direktzugriffsspeicher und verfahren zur herstellung
EP15844668.2A Withdrawn EP3149735A4 (de) 2014-09-25 2015-09-25 Leistungsreduzierung in einem thyristor-direktzugriffsspeicher
EP15844478.6A Withdrawn EP3149741A4 (de) 2014-09-25 2015-09-25 Verfahren zur speicherung und aktualisierung von daten in einem thyristor-direktzugriffsspeicher

Family Applications Before (2)

Application Number Title Priority Date Filing Date
EP15845023.9A Withdrawn EP3149740A4 (de) 2014-09-25 2015-09-25 Flüchtiger thyristor-direktzugriffsspeicher und verfahren zur herstellung
EP15844668.2A Withdrawn EP3149735A4 (de) 2014-09-25 2015-09-25 Leistungsreduzierung in einem thyristor-direktzugriffsspeicher

Country Status (2)

Country Link
EP (3) EP3149740A4 (de)
WO (3) WO2016049601A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018089559A1 (en) * 2016-11-08 2018-05-17 Kilopass Technology, Inc. Vertical thyristor cell and memory array with silicon germanium base regions

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040104400A1 (en) * 2001-04-05 2004-06-03 Nemati Farid Dynamic data restore in thyristor-based memory device
US7460395B1 (en) * 2005-06-22 2008-12-02 T-Ram Semiconductor, Inc. Thyristor-based semiconductor memory and memory array with data refresh
US20100172200A1 (en) * 2006-12-22 2010-07-08 Fujitsu Limited Memory device, memory controller and memory system
US20140050022A1 (en) * 2012-08-17 2014-02-20 Geoff W. Taylor Thyristor Memory Cell Integrated Circuit
WO2014034559A1 (ja) * 2012-08-29 2014-03-06 ピーエスフォー ルクスコ エスエイアールエル 不使用ワード線をリフレッシュするサイリスタメモリまたはｆｂｃメモリ
US20140269046A1 (en) * 2013-03-15 2014-09-18 Micron Technology, Inc. Apparatuses and methods for use in selecting or isolating memory cells

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6026042A (en) * 1998-04-10 2000-02-15 Micron Technology, Inc. Method and apparatus for enhancing the performance of semiconductor memory devices
US6229161B1 (en) * 1998-06-05 2001-05-08 Stanford University Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches
US6627924B2 (en) * 2001-04-30 2003-09-30 Ibm Corporation Memory system capable of operating at high temperatures and method for fabricating the same
US6906354B2 (en) * 2001-06-13 2005-06-14 International Business Machines Corporation T-RAM cell having a buried vertical thyristor and a pseudo-TFT transfer gate and method for fabricating the same
CA2447204C (en) * 2002-11-29 2010-03-23 Memory Management Services Ltd. Error correction scheme for memory
KR100557637B1 (ko) * 2004-01-06 2006-03-10 주식회사 하이닉스반도체 저전력 반도체 메모리 장치
US7542340B2 (en) * 2006-07-11 2009-06-02 Innovative Silicon Isi Sa Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
US8547756B2 (en) * 2010-10-04 2013-10-01 Zeno Semiconductor, Inc. Semiconductor memory device having an electrically floating body transistor
US7630235B2 (en) * 2007-03-28 2009-12-08 Globalfoundries Inc. Memory cells, memory devices and integrated circuits incorporating the same
US8116157B2 (en) * 2007-11-20 2012-02-14 Qimonda Ag Integrated circuit
US8130547B2 (en) * 2007-11-29 2012-03-06 Zeno Semiconductor, Inc. Method of maintaining the state of semiconductor memory having electrically floating body transistor
US7940558B2 (en) * 2007-12-21 2011-05-10 Qimonda Ag Integrated circuit comprising a thyristor and method of controlling a memory cell comprising a thyristor
US8120951B2 (en) * 2008-05-22 2012-02-21 Micron Technology, Inc. Memory devices, memory device constructions, constructions, memory device forming methods, current conducting devices, and memory cell programming methods
US8773881B2 (en) * 2009-03-10 2014-07-08 Contour Semiconductor, Inc. Vertical switch three-dimensional memory array
US8139391B2 (en) * 2009-04-03 2012-03-20 Sandisk 3D Llc Multi-bit resistance-switching memory cell
JP2011108327A (ja) * 2009-11-18 2011-06-02 Toshiba Corp 不揮発性半導体記憶装置
US8441881B1 (en) * 2010-07-02 2013-05-14 T-Ram Semiconductor Tracking for read and inverse write back of a group of thyristor-based memory cells
US8426258B2 (en) * 2010-10-12 2013-04-23 Io Semiconductor, Inc. Vertical semiconductor device with thinned substrate
US8519431B2 (en) * 2011-03-08 2013-08-27 Micron Technology, Inc. Thyristors
US9013918B2 (en) * 2011-05-04 2015-04-21 Institute of Microelectronics, Chinese Academy of Sciences Two-terminal memory cell and semiconductor memory device based on different states of stable current
US8824230B2 (en) * 2011-09-30 2014-09-02 Qualcomm Incorporated Method and apparatus of reducing leakage power in multiple port SRAM memory cell

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040104400A1 (en) * 2001-04-05 2004-06-03 Nemati Farid Dynamic data restore in thyristor-based memory device
US7460395B1 (en) * 2005-06-22 2008-12-02 T-Ram Semiconductor, Inc. Thyristor-based semiconductor memory and memory array with data refresh
US20100172200A1 (en) * 2006-12-22 2010-07-08 Fujitsu Limited Memory device, memory controller and memory system
US20140050022A1 (en) * 2012-08-17 2014-02-20 Geoff W. Taylor Thyristor Memory Cell Integrated Circuit
WO2014034559A1 (ja) * 2012-08-29 2014-03-06 ピーエスフォー ルクスコ エスエイアールエル 不使用ワード線をリフレッシュするサイリスタメモリまたはｆｂｃメモリ
US20140269046A1 (en) * 2013-03-15 2014-09-18 Micron Technology, Inc. Apparatuses and methods for use in selecting or isolating memory cells

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2016049606A1 *

Also Published As

Publication number Publication date
WO2016049606A1 (en) 2016-03-31
EP3149735A1 (de) 2017-04-05
WO2016049601A1 (en) 2016-03-31
EP3149741A1 (de) 2017-04-05
EP3149735A4 (de) 2018-06-13
WO2016049608A1 (en) 2016-03-31
EP3149740A4 (de) 2017-11-01
EP3149740A1 (de) 2017-04-05

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