EP3216065A4 - Kreuzpunktspeicher und verfahren zur herstellung davon - Google Patents

Kreuzpunktspeicher und verfahren zur herstellung davon Download PDF

Info

Publication number
EP3216065A4
EP3216065A4 EP15856617.4A EP15856617A EP3216065A4 EP 3216065 A4 EP3216065 A4 EP 3216065A4 EP 15856617 A EP15856617 A EP 15856617A EP 3216065 A4 EP3216065 A4 EP 3216065A4
Authority
EP
European Patent Office
Prior art keywords
fabrication
methods
cross
same
point memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP15856617.4A
Other languages
English (en)
French (fr)
Other versions
EP3216065B1 (de
EP3216065A1 (de
Inventor
Paolo Fantini
Cristina Casellato
Fabio Pellizzer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of EP3216065A1 publication Critical patent/EP3216065A1/de
Publication of EP3216065A4 publication Critical patent/EP3216065A4/de
Application granted granted Critical
Publication of EP3216065B1 publication Critical patent/EP3216065B1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H10B63/24—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes of the Ovonic threshold switching type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/061—Shaping switching materials
    • H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/861—Thermal details
    • H10N70/8616—Thermal insulation means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8828—Tellurides, e.g. GeSbTe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/021—Manufacture or treatment of air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/20—Air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/072—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/098—Manufacture or treatment of dielectric parts thereof by filling between adjacent conductive parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/46—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising air gaps

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
EP15856617.4A 2014-11-07 2015-10-13 Kreuzpunktspeicher und verfahren zur herstellung davon Active EP3216065B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/535,731 US9748311B2 (en) 2014-11-07 2014-11-07 Cross-point memory and methods for fabrication of same
PCT/US2015/055392 WO2016073152A1 (en) 2014-11-07 2015-10-13 Cross-point memory and methods for fabrication of same

Publications (3)

Publication Number Publication Date
EP3216065A1 EP3216065A1 (de) 2017-09-13
EP3216065A4 true EP3216065A4 (de) 2018-06-27
EP3216065B1 EP3216065B1 (de) 2020-05-20

Family

ID=55909607

Family Applications (1)

Application Number Title Priority Date Filing Date
EP15856617.4A Active EP3216065B1 (de) 2014-11-07 2015-10-13 Kreuzpunktspeicher und verfahren zur herstellung davon

Country Status (8)

Country Link
US (3) US9748311B2 (de)
EP (1) EP3216065B1 (de)
JP (2) JP6795496B2 (de)
KR (1) KR101976966B1 (de)
CN (2) CN107078150B (de)
SG (1) SG11201703709XA (de)
TW (1) TWI605581B (de)
WO (1) WO2016073152A1 (de)

Families Citing this family (69)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9605487B2 (en) 2012-04-11 2017-03-28 Baker Hughes Incorporated Methods for forming instrumented cutting elements of an earth-boring drilling tool
US9212546B2 (en) 2012-04-11 2015-12-15 Baker Hughes Incorporated Apparatuses and methods for obtaining at-bit measurements for an earth-boring drilling tool
US9577010B2 (en) 2014-02-25 2017-02-21 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
US9484196B2 (en) 2014-02-25 2016-11-01 Micron Technology, Inc. Semiconductor structures including liners comprising alucone and related methods
US11223014B2 (en) 2014-02-25 2022-01-11 Micron Technology, Inc. Semiconductor structures including liners comprising alucone and related methods
US9806129B2 (en) 2014-02-25 2017-10-31 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
US10249819B2 (en) 2014-04-03 2019-04-02 Micron Technology, Inc. Methods of forming semiconductor structures including multi-portion liners
US9768378B2 (en) 2014-08-25 2017-09-19 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
US9812502B2 (en) * 2015-08-31 2017-11-07 Toshiba Memory Corporation Semiconductor memory device having variable resistance elements provided at intersections of wiring lines
TWI625874B (zh) * 2015-11-05 2018-06-01 華邦電子股份有限公司 導電橋接式隨機存取記憶體
US9892961B1 (en) * 2016-08-09 2018-02-13 International Business Machines Corporation Air gap spacer formation for nano-scale semiconductor devices
KR20190142335A (ko) * 2017-05-01 2019-12-26 소니 세미컨덕터 솔루션즈 가부시키가이샤 선택 소자 및 기억 장치
KR20180134048A (ko) * 2017-06-08 2018-12-18 에스케이하이닉스 주식회사 전자 장치 및 그 제조방법
KR102375588B1 (ko) * 2017-07-06 2022-03-16 삼성전자주식회사 반도체 장치 및 그 제조 방법
US10453855B2 (en) * 2017-08-11 2019-10-22 Micron Technology, Inc. Void formation in charge trap structures
US10446572B2 (en) 2017-08-11 2019-10-15 Micron Technology, Inc. Void formation for charge trap structures
US10680006B2 (en) 2017-08-11 2020-06-09 Micron Technology, Inc. Charge trap structure with barrier to blocking region
US10164009B1 (en) 2017-08-11 2018-12-25 Micron Technology, Inc. Memory device including voids between control gates
US10153196B1 (en) * 2017-08-24 2018-12-11 Micron Technology, Inc. Arrays of cross-point memory structures
US10147875B1 (en) * 2017-08-31 2018-12-04 Micron Technology, Inc. Semiconductor devices and electronic systems having memory structures
US10475995B2 (en) 2017-12-22 2019-11-12 Intel Corporation Tip-contact controlled three dimensional (3D) vertical self select memory
US10622558B2 (en) * 2018-03-30 2020-04-14 Intel Corporation Non-volatile memory cell structures including a chalcogenide material having a narrowed end and a three-dimensional memory device
US10950786B2 (en) * 2018-05-17 2021-03-16 Macronix International Co., Ltd. Layer cost scalable 3D phase change cross-point memory
US11180989B2 (en) 2018-07-03 2021-11-23 Baker Hughes Holdings Llc Apparatuses and methods for forming an instrumented cutting for an earth-boring drilling tool
US10584581B2 (en) 2018-07-03 2020-03-10 Baker Hughes, A Ge Company, Llc Apparatuses and method for attaching an instrumented cutting element to an earth-boring drilling tool
US10991425B2 (en) 2018-08-13 2021-04-27 Micron Technology, Inc. Access line grain modulation in a memory device
US11189662B2 (en) 2018-08-13 2021-11-30 Micron Technology Memory cell stack and via formation for a memory device
KR102630957B1 (ko) * 2018-12-19 2024-01-31 에스케이하이닉스 주식회사 메모리 소자 및 이를 포함하는 전자장치
KR102821718B1 (ko) * 2019-03-05 2025-06-18 에스케이하이닉스 주식회사 전자 장치 및 그 제조 방법
US10832941B2 (en) * 2019-03-27 2020-11-10 International Business Machines Corporation Airgap isolation for backend embedded memory stack pillar arrays
US10930707B2 (en) 2019-07-02 2021-02-23 Micron Technology, Inc. Memory device with a split pillar architecture
US11282895B2 (en) * 2019-07-02 2022-03-22 Micron Technology, Inc. Split pillar architectures for memory devices
US11037944B2 (en) * 2019-07-10 2021-06-15 Micron Technology, Inc. Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias
KR102617960B1 (ko) * 2019-08-12 2023-12-26 삼성전자주식회사 2-스텝 갭-필 공정을 이용하여 반도체 소자를 형성하는 방법
KR102817555B1 (ko) * 2019-09-11 2025-06-10 에스케이하이닉스 주식회사 전자 장치 및 그 제조 방법
US11373695B2 (en) 2019-12-18 2022-06-28 Micron Technology, Inc. Memory accessing with auto-precharge
US11444093B2 (en) * 2020-01-10 2022-09-13 Micron Technology, Inc. Memory arrays and methods of forming memory arrays
US11270909B2 (en) 2020-01-27 2022-03-08 Micron Technology, Inc. Apparatus with species on or in conductive material on elongate lines
US20210288250A1 (en) 2020-03-13 2021-09-16 International Business Machines Corporation Phase Change Memory Having Gradual Reset
US11430950B2 (en) 2020-03-27 2022-08-30 Micron Technology, Inc. Low resistance via contacts in a memory device
KR102779883B1 (ko) * 2020-06-09 2025-03-12 삼성전자주식회사 3차원 반도체 메모리 장치
KR102828453B1 (ko) 2020-06-22 2025-07-03 삼성전자주식회사 가변 저항 메모리 소자
US11551736B2 (en) * 2020-07-30 2023-01-10 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method for fabricating the same
TWI749678B (zh) * 2020-08-03 2021-12-11 力晶積成電子製造股份有限公司 記憶元件及其形成方法
US11258023B1 (en) * 2020-08-05 2022-02-22 Nantero, Inc. Resistive change elements using passivating interface gaps and methods for making same
US11231870B1 (en) 2020-08-11 2022-01-25 Micron Technology, Inc. Memory sub-system retirement determination
KR102675158B1 (ko) * 2020-08-24 2024-06-12 삼성전자주식회사 반도체 메모리 장치 및 그 제조 방법
CN111969110B (zh) * 2020-09-04 2022-02-01 长江先进存储产业创新中心有限责任公司 一种存储器及其制备方法
US12153823B2 (en) 2020-10-12 2024-11-26 Intel Corporation Multi-level memory programming and readout
KR102792188B1 (ko) * 2020-10-14 2025-04-04 삼성전자주식회사 반도체 메모리 장치 및 그 제조 방법
CN112420729B (zh) * 2020-11-06 2021-11-16 长江存储科技有限责任公司 3d存储器件及其制造方法
KR102866070B1 (ko) 2020-11-10 2025-09-26 삼성전자주식회사 칼코겐 화합물 및 이를 포함하는 반도체 소자
US12119064B2 (en) 2020-12-07 2024-10-15 Intel Corporation Binary to ternary convertor for multilevel memory
US11937514B2 (en) * 2021-05-06 2024-03-19 International Business Machines Corporation High-density memory devices using oxide gap fill
US20220406794A1 (en) * 2021-06-18 2022-12-22 Sandisk Technologies Llc Three-dimensional memory device and method of making thereof using double pitch word line formation
CN113594202B (zh) * 2021-07-07 2024-07-16 长江先进存储产业创新中心有限责任公司 相变存储器及其制作方法
KR20230020815A (ko) 2021-08-04 2023-02-13 삼성전자주식회사 스위칭 소자 및 이를 포함하는 메모리 소자
KR102544394B1 (ko) * 2021-08-05 2023-06-16 포항공과대학교 산학협력단 3차원 수직형 메모리 소자 및 그 제조 방법
US11950434B2 (en) * 2021-08-26 2024-04-02 Taiwan Semiconductor Manufacturing Company, Ltd. Memory device for reducing thermal crosstalk
US12610754B2 (en) 2021-09-14 2026-04-21 Samsung Electronics Co., Ltd. Chalcogenide-based material, and switching device and memory device that include the same
KR102919286B1 (ko) 2021-09-17 2026-01-27 삼성전자주식회사 반도체 소자 및 이를 포함한 반도체 장치
US12381077B2 (en) * 2021-11-29 2025-08-05 Asm Ip Holding B.V. Methods of filling recesses on substrate surfaces and forming voids therein
US12588218B2 (en) 2022-04-11 2026-03-24 Samsung Electronics Co., Ltd. Chalcogenide material, switching device including the chalcogenide material, and memory device including the switching device
KR20230162444A (ko) 2022-05-20 2023-11-28 삼성전자주식회사 상변화 재료를 포함하는 메모리 장치
US12254922B2 (en) 2022-08-04 2025-03-18 Samsung Electronics Co., Ltd. Memory device including switching material and phase change material
KR20240030817A (ko) 2022-08-31 2024-03-07 삼성전자주식회사 메모리 소자 및 이를 포함하는 메모리 장치
KR20240043592A (ko) 2022-09-27 2024-04-03 삼성전자주식회사 상변화 메모리 구조체 및 이를 포함하는 상변화 메모리 소자
TWI857466B (zh) * 2023-01-19 2024-10-01 華邦電子股份有限公司 快閃記憶體及其形成方法
US20250344415A1 (en) * 2024-05-06 2025-11-06 Micron Technology, Inc. Memory architectures with partially filled piers

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090127538A1 (en) * 2007-11-15 2009-05-21 Samsung Electronics Co. Ltd. Phase-Changeable Memory Devices Having Reduced Susceptibility to Thermal Interference

Family Cites Families (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6404003B1 (en) 1999-07-28 2002-06-11 Symetrix Corporation Thin film capacitors on silicon germanium substrate
US6875651B2 (en) 2003-01-23 2005-04-05 Sharp Laboratories Of America, Inc. Dual-trench isolated crosspoint memory array and method for fabricating same
US7045849B2 (en) * 2003-05-21 2006-05-16 Sandisk Corporation Use of voids between elements in semiconductor structures for isolation
US20100040820A1 (en) * 2004-03-15 2010-02-18 Arz Juergen Composite film for a receptacle, particularly a tube
US8937292B2 (en) 2011-08-15 2015-01-20 Unity Semiconductor Corporation Vertical cross point arrays for ultra high density memory applications
JP2006302950A (ja) * 2005-04-15 2006-11-02 Renesas Technology Corp 不揮発性半導体装置および不揮発性半導体装置の製造方法
JP4731262B2 (ja) * 2005-09-22 2011-07-20 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置および、不揮発性半導体記憶装置の製造方法
WO2007131363A1 (en) * 2006-05-17 2007-11-22 Her Majesty The Queen In Right Of Canada As Represented By The Minister Of Health Monoclonal antibodies to anthrax protective antigen
KR100833434B1 (ko) * 2006-06-30 2008-05-29 주식회사 하이닉스반도체 플래쉬 메모리 소자의 제조 방법
KR100908812B1 (ko) 2006-12-27 2009-07-21 주식회사 하이닉스반도체 다층의 스택을 갖는 반도체소자의 제조 방법
WO2008111199A1 (ja) 2007-03-14 2008-09-18 Fujitsu Microelectronics Limited 半導体装置及びその製造方法
JP2008283045A (ja) * 2007-05-11 2008-11-20 Toshiba Corp 半導体装置の製造方法および半導体装置
US8233308B2 (en) 2007-06-29 2012-07-31 Sandisk 3D Llc Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
US9129845B2 (en) * 2007-09-19 2015-09-08 Micron Technology, Inc. Buried low-resistance metal word lines for cross-point variable-resistance material memories
JP4729060B2 (ja) * 2008-02-26 2011-07-20 株式会社東芝 半導体記憶装置の製造方法
JP2009212202A (ja) * 2008-03-03 2009-09-17 Elpida Memory Inc 相変化メモリ装置およびその製造方法
US7852658B2 (en) 2008-03-14 2010-12-14 Micron Technology, Inc. Phase change memory cell with constriction structure
JP5342189B2 (ja) * 2008-08-06 2013-11-13 株式会社日立製作所 不揮発性記憶装置及びその製造方法
US8153527B2 (en) 2008-10-13 2012-04-10 Globalfoundries Singapore Pte. Ltd. Method for reducing sidewall etch residue
US20100096611A1 (en) 2008-10-16 2010-04-22 Seagate Technology Llc Vertically integrated memory structures
US8623697B2 (en) 2008-12-31 2014-01-07 Micron Technology, Inc. Avoiding degradation of chalcogenide material during definition of multilayer stack structure
KR101510776B1 (ko) 2009-01-05 2015-04-10 삼성전자주식회사 반도체 상변화 메모리 소자
US8344513B2 (en) 2009-03-23 2013-01-01 Taiwan Semiconductor Manufacturing Company, Ltd. Barrier for through-silicon via
JP4792097B2 (ja) * 2009-03-25 2011-10-12 株式会社東芝 不揮発性記憶装置及びその製造方法
JP2010258249A (ja) * 2009-04-27 2010-11-11 Toshiba Corp 相変化メモリ装置
US8400090B2 (en) * 2009-08-10 2013-03-19 Emerson Electric Co. HVAC condenser assemblies having controllable input voltages
JP5025696B2 (ja) * 2009-08-11 2012-09-12 株式会社東芝 抵抗変化メモリ
US8203134B2 (en) 2009-09-21 2012-06-19 Micron Technology, Inc. Memory devices with enhanced isolation of memory cells, systems including same and methods of forming same
US8765581B2 (en) 2009-11-30 2014-07-01 Micron Technology, Inc. Self-aligned cross-point phase change memory-switch array
JP5420436B2 (ja) * 2010-01-15 2014-02-19 株式会社日立製作所 不揮発性記憶装置およびその製造方法
TW201207852A (en) 2010-04-05 2012-02-16 Mosaid Technologies Inc Semiconductor memory device having a three-dimensional structure
US8546239B2 (en) * 2010-06-11 2013-10-01 Sandisk Technologies Inc. Methods of fabricating non-volatile memory with air gaps
WO2011159702A2 (en) 2010-06-14 2011-12-22 Saint-Gobain Ceramics & Plastics, Inc. Scintillator including a scintillator particulate and a polymer matrix
US8946048B2 (en) * 2010-06-19 2015-02-03 Sandisk Technologies Inc. Method of fabricating non-volatile memory with flat cell structures and air gap isolation
KR20120031667A (ko) * 2010-09-27 2012-04-04 삼성전자주식회사 반도체 소자 및 반도체 소자 제조 방법
US8575019B2 (en) 2010-09-30 2013-11-05 Institute of Microelectronics, Chinese Academy of Sciences Metal interconnection structure and method for forming metal interlayer via and metal interconnection line
KR20120043979A (ko) * 2010-10-27 2012-05-07 삼성전자주식회사 비휘발성 기억 소자 및 비휘발성 기억 소자의 제조 방법
US8945996B2 (en) * 2011-04-12 2015-02-03 Micron Technology, Inc. Methods of forming circuitry components and methods of forming an array of memory cells
JP2013026347A (ja) * 2011-07-19 2013-02-04 Toshiba Corp 半導体装置およびその製造方法
KR20130015167A (ko) * 2011-08-02 2013-02-13 삼성전자주식회사 에어 갭을 갖는 반도체 소자 및 그 제조 방법
JP5611903B2 (ja) 2011-08-09 2014-10-22 株式会社東芝 抵抗変化メモリ
JP2013069794A (ja) * 2011-09-21 2013-04-18 Toshiba Corp 不揮発性半導体記憶装置
JP2013089859A (ja) * 2011-10-20 2013-05-13 Toshiba Corp 半導体装置の製造方法
US9252188B2 (en) * 2011-11-17 2016-02-02 Micron Technology, Inc. Methods of forming memory cells
US8613863B2 (en) 2011-11-29 2013-12-24 Intermolecular, Inc. Methods for selective etching of a multi-layer substrate
US9136307B2 (en) 2012-02-09 2015-09-15 Micron Technology, Inc. Memory cells and memory cell formation methods using sealing material
JP2013201184A (ja) * 2012-03-23 2013-10-03 Toshiba Corp 半導体記憶装置の製造方法
KR20140030483A (ko) * 2012-08-30 2014-03-12 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 그 제조 방법
US8778758B2 (en) * 2012-08-30 2014-07-15 Kabushiki Kaisha Toshiba Method for manufacturing semiconductor device and semiconductor device
KR20140077501A (ko) * 2012-12-14 2014-06-24 에스케이하이닉스 주식회사 저항변화 메모리 소자 및 그 제조 방법
US9553262B2 (en) * 2013-02-07 2017-01-24 Micron Technology, Inc. Arrays of memory cells and methods of forming an array of memory cells
US10084016B2 (en) 2013-11-21 2018-09-25 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
CN103682094B (zh) * 2013-12-11 2016-08-17 上海新安纳电子科技有限公司 一种相变存储器结构及其制备方法
KR20150090472A (ko) * 2014-01-29 2015-08-06 삼성전자주식회사 가변 저항 메모리 장치 및 그 제조 방법
US9577010B2 (en) 2014-02-25 2017-02-21 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
US9806129B2 (en) 2014-02-25 2017-10-31 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
US9685607B2 (en) * 2014-03-11 2017-06-20 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
US10249819B2 (en) 2014-04-03 2019-04-02 Micron Technology, Inc. Methods of forming semiconductor structures including multi-portion liners
US9768378B2 (en) 2014-08-25 2017-09-19 Micron Technology, Inc. Cross-point memory and methods for fabrication of same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090127538A1 (en) * 2007-11-15 2009-05-21 Samsung Electronics Co. Ltd. Phase-Changeable Memory Devices Having Reduced Susceptibility to Thermal Interference

Also Published As

Publication number Publication date
US20160133671A1 (en) 2016-05-12
WO2016073152A1 (en) 2016-05-12
US20170358628A1 (en) 2017-12-14
US9748311B2 (en) 2017-08-29
TW201633527A (zh) 2016-09-16
US10680037B2 (en) 2020-06-09
US10396125B2 (en) 2019-08-27
CN107078150A (zh) 2017-08-18
TWI605581B (zh) 2017-11-11
KR20170081671A (ko) 2017-07-12
CN107078150B (zh) 2019-01-08
JP2017537470A (ja) 2017-12-14
KR101976966B1 (ko) 2019-05-09
EP3216065B1 (de) 2020-05-20
JP2019165235A (ja) 2019-09-26
CN110085739B (zh) 2023-08-01
JP6795496B2 (ja) 2020-12-02
SG11201703709XA (en) 2017-06-29
CN110085739A (zh) 2019-08-02
US20180358411A1 (en) 2018-12-13
EP3216065A1 (de) 2017-09-13

Similar Documents

Publication Publication Date Title
EP3216065A4 (de) Kreuzpunktspeicher und verfahren zur herstellung davon
EP3111488A4 (de) Kreuzpunktspeicher und verfahren zur herstellung davon
EP3140834A4 (de) Vorrichtungen und verfahren für bidirektionalen zugang von kreuzpunktarrays
EP3138128A4 (de) Ferroelektrischer speicher und verfahren zur formung davon
EP3167448A4 (de) Vergleichsoperationen in einem speicher
EP3212225A4 (de) Verfahren und zusammensetzungen für modifizierte t-zellen
EP3259757A4 (de) Speicherzellen
EP3200474A4 (de) Offener kopfhörer
EP3177288A4 (de) Prmt5-inhibitoren und verwendungen davon
EP3160477A4 (de) Prmt5-inhibitoren und verwendungen davon
EP3160466A4 (de) Prmt5-inhibitoren und verwendungen davon
EP3188787A4 (de) Verfahren und vorrichtungen für transkarotiszugang
EP3186617A4 (de) Anordnungen aus integrierten analytischen vorrichtungen
EP3172213A4 (de) Makrocyclische kinasehemmer und verwendungen davon
EP3207574A4 (de) Speicherzellen, halbleiterbauelemente und verfahren zur herstellung
EP3297049A4 (de) Magnetspeichervorrichtung
EP3126969A4 (de) Erweiterbare anwendungsdarstellung
EP3140833A4 (de) Vorrichtungen und verfahren zur durchführung mehrerer speicheroperationen
EP3099171A4 (de) Dihydropteridinonderivate und verwendungen davon
EP3182414A4 (de) Speicherschaltung
EP3108497A4 (de) Speicherzelle mit anti-kondensierungsfunktion
SG11201607629UA (en) Memory arrays and methods of forming memory arrays
EP3108478A4 (de) Schaltkomponenten und speichereinheiten
EP3143966A4 (de) Stent und verfahren zur herstellung davon
EP3189178A4 (de) Poröses nanokomposit und entsprechendes verfahren

Legal Events

Date Code Title Description
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE

PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20170505

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

DAV Request for validation of the european patent (deleted)
DAX Request for extension of the european patent (deleted)
A4 Supplementary search report drawn up and despatched

Effective date: 20180529

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 45/00 20060101AFI20180523BHEP

Ipc: H01L 21/76 20060101ALI20180523BHEP

Ipc: H01L 27/24 20060101ALI20180523BHEP

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

17Q First examination report despatched

Effective date: 20190327

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

INTG Intention to grant announced

Effective date: 20191202

GRAJ Information related to disapproval of communication of intention to grant by the applicant or resumption of examination proceedings by the epo deleted

Free format text: ORIGINAL CODE: EPIDOSDIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

GRAR Information related to intention to grant a patent recorded

Free format text: ORIGINAL CODE: EPIDOSNIGR71

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE PATENT HAS BEEN GRANTED

INTC Intention to grant announced (deleted)
AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

INTG Intention to grant announced

Effective date: 20200414

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602015053150

Country of ref document: DE

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 1273199

Country of ref document: AT

Kind code of ref document: T

Effective date: 20200615

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20200520

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200820

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200821

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200920

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200921

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200820

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 1273199

Country of ref document: AT

Kind code of ref document: T

Effective date: 20200520

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602015053150

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20210223

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201013

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20201031

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201031

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201031

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201031

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201013

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200520

REG Reference to a national code

Ref country code: DE

Ref legal event code: R079

Ref document number: 602015053150

Country of ref document: DE

Free format text: PREVIOUS MAIN CLASS: H01L0045000000

Ipc: H10N0070000000

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20251028

Year of fee payment: 11

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20251023

Year of fee payment: 11

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20251027

Year of fee payment: 11