EP3557946A1 - Steuergerät, lichtquellenansteuerungsschaltung und verfahren zur steuerung eines lichtquellenmoduls - Google Patents

Steuergerät, lichtquellenansteuerungsschaltung und verfahren zur steuerung eines lichtquellenmoduls Download PDF

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Publication number
EP3557946A1
EP3557946A1 EP18194489.3A EP18194489A EP3557946A1 EP 3557946 A1 EP3557946 A1 EP 3557946A1 EP 18194489 A EP18194489 A EP 18194489A EP 3557946 A1 EP3557946 A1 EP 3557946A1
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EP
European Patent Office
Prior art keywords
switch
light source
signal
module
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP18194489.3A
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English (en)
French (fr)
Inventor
Zhimou Ren
Yanjun Li
Bingqiang Li
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O2Micro Inc
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O2Micro Inc
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Filing date
Publication date
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Publication of EP3557946A1 publication Critical patent/EP3557946A1/de
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/20Controlling the colour of the light
    • H05B45/24Controlling the colour of the light using electrical feedback from LEDs or from LED modules
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10Controlling the light source
    • H05B47/16Controlling the light source by timing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/10Controlling the intensity of the light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/10Controlling the intensity of the light
    • H05B45/14Controlling the intensity of the light using electrical feedback from LEDs or from LED modules
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30Driver circuits

Definitions

  • LED light-emitting diode (LED) light sources offer several advantages such as low power conservation , environment friendly, high power efficiency, long lifespan and so on. Therefore, there is a trend to replace incandescent lamps with LED light sources.
  • An LED bulb is one type of the LED lamps. The LED bulb has the shape and size similar to the traditional incandescent lamps. LED light sources and control chips are integrated within an LED bulb.
  • a conventional LED light source driving circuit includes two control chips, wherein one is operable for regulating the brightness of the light source and the other is operable for regulating the color of the light source. As the conventional LED light source driving circuit uses two individual control chips, the cost for manufacturing is increased.
  • Embodiments in accordance with the present invention provide a controller, a light source driving circuit and a method for controlling a light source module.
  • a controller for controlling a light source module includes a current input terminal, a switch monitoring terminal, a first control terminal, a second control terminal and a current monitoring terminal.
  • the current input terminal is coupled to a power source through a rectifier and is operable for receiving electric power from the power source.
  • the switch monitoring terminal is coupled to a power switch and is operable for receiving a switch monitoring signal indicating the on/off status of the power switch.
  • the power switch is coupled between the rectifier and the power source.
  • the first control terminal is operable for turning on or turning off a first light source in the light source module based on the switch monitoring signal.
  • the second control terminal is operable for turning on or turning off a second light source in the light source module based on the switch monitoring signal.
  • the current monitoring terminal is operable for monitoring a current flowing through the first light source and a current flowing through the second light source.
  • Said controller may further comprise
  • a current may flow from said current input terminal through said third switch, said current monitoring terminal and an inductor to ground if said third switch is on.
  • a current may flow through said inductor, said first light source, said first control terminal, said first switch and said current monitoring terminal if said third switch is off and said first switch is on; wherein a current may flow through said inductor, said second light source, said second control terminal, said second switch and said current monitoring terminal if said third switch is off and said second switch is on.
  • said logic control module may comprise a memory module, wherein said logic control module is operable for generating a first control signal to turn on or turn off said first light source based on data stored in said memory module and generating a second control signal to turn on or turn off said second light source based on data stored in said memory module.
  • said memory module may comprise:
  • said logic control module may further comprise:
  • said logic unit may comprise:
  • said logic unit may generate said write enable signal and said regulating signal, and may write said count value to said memory module by using said reading and writing unit.
  • said logic control module may further comprise:
  • a light source driving circuit includes a light source module and a controller.
  • the light source module includes a first light source and a second light source.
  • the controller is coupled to the light source module and is operable for receiving electric power from a power source through a rectifier and powering the light source module, the controller includes a memory module.
  • the controller is operable for generating a first control signal to turn on or turn off the first light source based on data stored in the memory module, and generating a second control signal to turn on or turn off the second light source based on data stored in the memory module.
  • said memory module may further comprise:
  • said controller may comprise:
  • Said light source driving circuit may further comprise:
  • said logic control module may further comprise:
  • said logic unit may comprise:
  • said logic control module may further comprise: a power supply unit, operable for providing a first voltage to allow said reading and writing unit to write to said memory module and clamping a voltage at said switch monitoring terminal to a second voltage to turn on said light source module, wherein said controller receives said switch monitoring signal from said switch monitoring terminal, wherein said first voltage is greater than said second voltage.
  • a method for controlling a light source module including a first light source and a second light source includes the following steps: receiving electric power from a power source and powering the light source module by using a controller; reading data stored in a memory module; and generating a first control signal by the controller based on data stored in the memory module to turn on or turn off the first light source and generating a second control signal by the controller based on data stored in the memory module to turn on or turn off the second light source.
  • Said method may further comprise:
  • said method may further comprise:
  • FIG. 1 shows a light source driving circuit 100, in accordance with one embodiment of the present invention.
  • the light source driving circuit 100 includes a light source module130.
  • the light source module130 includes a first light source 111 and a second light source 112.
  • a capacitor 113 is coupled in parallel with the first light source 111 and a capacitor 114 is coupled in parallel with the second light source 112.
  • the first light source 111 and the second light source 112 are LED strings with different color temperature.
  • the first light source 111 and the second light source 112 are LED strings with different brightness.
  • the light source module130 can have different modes when it is turned on according to the on/off status of the first light source 111 and the second light source 112.
  • the light source module130 when turned on, can be in mode A, mode B or mode C, wherein mode A is a default mode.
  • mode A the first light source 111 is turned on and the second light source 112 is turned off.
  • mode B both the first light source 111 and the second light source 112 are turned on.
  • mode C the first light source 111 is turned off and the second light source 112 is turned on.
  • the light source driving circuit 100 further includes a controller 110.
  • the controller 110 is coupled to the light source module 130, receives electric power from a power source 102 through a rectifier 106 and supplies electric power to the light source module 130.
  • the controller 110 includes a memory module (shown in FIG. 3 ).
  • the controller 110 generates a first control signal to turn on or turn off the first light source 111 and generates a second control signal to turn on or turn off the second light source 112 based on data stored in the memory module to switch the mode of the light source module 130.
  • the terminals of the controller 110 include a current input terminal DRAIN, a switch monitoring terminal VDD, a first control terminal SW1, a second control terminal SW2 and a current monitoring terminal CS.
  • the current input terminal DRAIN is coupled to the power source 102 through the rectifier 106 and receives electric power from the power source 102.
  • the switch monitoring terminal VDD is coupled to a power switch 104 and is operable for receiving a switch monitoring signal SWMON indicating the on/off status of the power switch 104.
  • the switch monitoring signal SWMON is the voltage at the switch monitoring terminal VDD.
  • the switch monitoring terminal VDD also acts as the power terminal of the controller 110 and receives electric power from the power source 102.
  • the power switch 104 is coupled between the rectifier 106 and the power source 102.
  • the first control terminal SW1 is coupled to the first light source 111 and is operable for turning on or turning off the first light source 111 based on the switch monitoring signal SWMON.
  • the second control terminal SW2 is coupled to the second light source 112 and is operable for turning on or turning off the second light source 112 based on the switch monitoring signal SWMON.
  • the current monitoring terminal CS is coupled to the light source module 130 through a resistor 109 and an inductor 108, and is operable for monitoring a current flowing through the first light source 111 and a current flowing through the second light source 112.
  • FIG. 2 shows a controller 110 in FIG. 1 , in accordance with one embodiment of the present invention.
  • the controller 110 includes a first switch Q1 coupled to the first control terminal SW1, a second switch Q2 coupled to the second control terminal SW2, a third switch Q3 coupled to the current input terminal DRAIN, a fourth switch Q4 coupled between the third switch Q3 and the current input terminal DRAIN, and a logic control module 202 coupled to the first switch Q1, the second switch Q2, the third switch Q3 and the fourth switch Q4.
  • the status of the fourth switch Q4 is determined by the third switch Q3. If the third switch Q3 is on, the fourth switch Q4 is on; and if the third switch Q3 is off, the fourth switch Q4 is off.
  • the logic control module 202 updates data stored in the memory module (shown in FIG. 3 ) based on the switch monitoring signal SWMON and generates a first control signal DRV1 and a second control signal DRV2 based on data stored in the memory module.
  • the first control signal DRV1 controls the first switch Q1 to turn on or turn off the first light source 111.
  • the second control signal DRV2 controls the second switch Q2 to turn on or turn off the second light source 112.
  • the logic control module 202 controls the third switch Q3 using a third control signal DRV3 to regulate the total current of the light source module 130.
  • the controller 110 also includes a current detection unit 210, an error amplifier 208, a sawtooth signal generating unit 204 and a comparator 206.
  • the current detection unit 210 is coupled to the current monitoring terminal CS, and detects a current flowing through the first light source 111 and a current flowing through the second light source 112 (i.e., a current flowing through the first switch Q1 and a current flowing through the second switch Q2). If the first switch Q1 is on, the current detection unit 210 detects a current flowing through the first switch Q1. If the second switch Q2 is on, the current detection unit 210 detects a current flowing through the second switch Q2. If the first switch Q1 and the second switch Q2 are both on, the current detection unit 210 detects a sum of the current flowing through the first switch Q1 and the current flowing through the second switch Q2.
  • the error amplifier 208 compares an output signal of the current detection unit 210 with a preset reference signal ADJ, and outputs an error signal to the comparator 206.
  • the comparator 206 compares the error signal with a sawtooth wave signal output from the sawtooth wave signal generating unit 204, and outputs a comparison result to the logic control module 202.
  • the logic control module 202 generates the third control signal DRV3 based on the comparison result, and controls the duty cycle of the third switch Q3 via a driving unit 212, thereby regulating the total current of the light source module 130.
  • the fourth switch Q4 is also on, and a current from the power source 102 flows from the current input terminal DRAIN through the fourth switch Q4, the third switch Q3, the current monitoring terminal CS, the resistor 109, the inductor 108 to ground. During this period, the inductor 108 stores electric power. If the third switch Q3 is off and the first switch Q1 is on, the inductor 108 discharges, and a current flows from one end of the inductor 108 through the first light source 111, the first control terminal SW1, the first switch Q1, and the current monitoring terminal CS to the other end of the inductor 108.
  • the inductor 108 discharges, and a current flows from one end of the inductor 108 through the second light source 112, the second control terminal SW2, the second switch Q2, and the current monitoring terminal CS to the other end of the inductor 108.
  • FIG. 3 shows a logic control module 202 in FIG. 2 , in accordance with one embodiment of the present invention.
  • the logic control module 202 includes a trigger monitoring unit 302, a logic unit 310, a memory module 308, a reading and writing unit 304 and a power supply unit 306.
  • the power supply unit 306 receives electric power from the power source 102 from the switch monitoring signal SWMON and powers each component in the controller 110.
  • the trigger monitoring unit 302 is operable for generating a trigger signal DIMCLK according to the switch monitoring signal SWMON. In one embodiment, when the power switch 104 is off, a negative pulse appears in the trigger signal DIMCLK.
  • the logic unit 310 is operable for generating a read enable signal R_EN and a write enable signal W_EN according to the switch monitoring signal SWMON, and generating a regulating signal DIMSTATE according to the trigger signal DIMCLK.
  • the reading and writing unit 304 is operable for writing to the memory module 308 based on the write enable signal W_EN and the regulating signal DIMSTATE, and for reading the memory module 308 based on the read enable signal R_EN. Furthermore, the reading and writing unit 304 also generates the first control signal DRV1 and the second control signal DRV2 based on the data read from the memory module 308. The first control signal DRV1 and the second control signal DRV2 are used to control the on/off status of the first light source 111 and the second light source 112.
  • the logic unit 310 includes a counter 312 operable for storing a count value.
  • the counter 312 updates the count value based on the trigger signal DIMCLK. In one embodiment, the count value increases by 1 in response to each negative pulse in the trigger signal DIMCLK.
  • the power supply unit 306 provides a voltage greater than a write threshold V W-TH (e.g., the first voltage V1) to allow the reading and writing unit 304 to write to the memory module 308. If the voltage at the switch monitoring terminal VDD increases to the first voltage V1, the logic unit 310 outputs the write enable signal W_EN in a first status (e.g., at a high level) at time t W .
  • a write threshold V W-TH e.g., the first voltage V1
  • the reading and writing unit 304 writes the count value of the counter 312 to the memory module 308.
  • the logic unit 310 outputs the read enable signal R_EN in a first status (e.g., at a high level) and the reading and writing unit 304 reads the data from the memory module 308 to generate the first control signal DRV1 and the second control signal DRV2.
  • the first switch Q1 if the first control signal DRV1 is in the first status (e.g., at a high level), the first switch Q1 is on and the first light source 111 is turned on; if the first control signal DRV1 is in the second status (e.g., at a low level), the first switch Q1 is off and the first light source 111 is turned off. If the second control signal DRV2 is in the first status (e.g., at a high level), the second switch Q2 is on and the second light source 112 is turned on; if the second control signal DRV2 is in the second status (e.g., at a low level), the second switch Q2 is off and the second light source 112 is turned off.
  • the logic unit 310 outputs a clamp signal CLAMP in a first status (e.g., at a high level) to the power supply unit 306, making the power supply unit 306 to clamp the voltage at the switch monitoring terminal VDD to a second voltage V2 to enable components associated with dimming function in the controller 110 (e.g., the current detection unit 201, the error amplifier 208, the comparator 206, the sawtooth signal generating unit 204, etc.) to turn on the light source module 130.
  • the first voltage V1 is greater than the second voltage V2.
  • the power supply unit 306 first allows the voltage at the switch monitoring terminal VDD to increase to the first voltage V1 to allow write operation to the memory module 308, and then clamps (decreases) the voltage at the switch monitoring terminal VDD to the second voltage V2.
  • the second voltage V2 is a voltage that can enable the components associated with dimming function in the controller 110 to operate normally to turn on the light source module 130.
  • the light source module 130 can have different modes according to the status of the first control signal DRV1 and the second control signal DRV2. The status of the first control signal DRV1 and the second control signal DRV2 depend on the data read out by the reading and writing unit 304 from the memory module 308.
  • FIG. 4 shows a memory module 308 in FIG. 3 , in accordance with one embodiment of the present invention.
  • the memory module 308 includes a first memory unit 401 and a second memory unit 402, which are operable for storing the count value from the counter 312.
  • the two memory units can store one bit of the data respectively.
  • the reading and writing unit 304 reads data "00" from the memory module 308, then the first control signal DRV1 and the second control signal DRV2 are generated to make the first switch Q1 on and the second switch Q2 off, and the mode of the light source module 130 is mode A accordingly.
  • the reading and writing unit 304 reads data "01" from the memory module 308, then the first control signal DRV1 and the second control signal DRV2 are generated to make the first switch Q1 on and the second switch Q2 on, and the mode of the light source module 130 is mode B accordingly. If the reading and writing unit 304 reads data "10" from the memory module 308, the first control signal DRV1 and the second control signal DRV2 are generated to make the first switch Q1 off and the second switch Q2 on, and the mode of the light source module 130 is mode C accordingly.
  • FIG. 5 shows a memory unit 401 in FIG. 4 , in accordance with one embodiment of the present invention.
  • the structure of the second memory unit 402 is similar to that of the first memory unit 401.
  • the first memory unit 401 includes a P-type metal-oxide semiconductor capacitor (MOS capacitor) 501, a P-type MOS capacitor 502 and an N-type metal-oxide semiconductor field effect transistor (NMOSFET) 503.
  • MOS capacitor P-type metal-oxide semiconductor capacitor
  • NMOSFET N-type metal-oxide semiconductor field effect transistor
  • the gate of the first MOS capacitor 501, the gate of the second MOS capacitor 502 and the gate of the NMOSFET 503 are connected together.
  • the area of the first MOS capacitor 501 is greater than the area of the second MOS capacitor 502.
  • the area of the first MOS capacitor 501 is much greater than the sum of the area of the second MOS capacitor 502 and the area of the gate of the NMOSFET 503. In another embodiment, the area of the first MOS capacitor 501 is at least twice of the sum of the area of the second MOS capacitor 502 and the area of the gate of the NMOSFET 503.
  • the substrate, the source and the drain of the first MOS capacitor 501 are connected together to act as one electrode plate of the first MOS capacitor 501, and the electrode plate is labeled as the E terminal in FIG. 5 .
  • the gate of the first MOS capacitor 501 acts as the other plate of the first MOS capacitor 501.
  • the substrate, the source and the drain of the second MOS capacitor 502 are connected together to act as one electrode plate of the second MOS capacitor 502, and the electrode is labeled as the W terminal in FIG. 5 .
  • the gate of the second MOS capacitor 502 acts as the other plate of the second MOS capacitor 502.
  • the reading and writing unit 304 in order to write to the memory unit 401 (e.g., write a logical "0"), applies a voltage difference greater than the write threshold V W-TH between the E terminal and the W terminal.
  • the reading and writing unit 304 applies a high voltage on the E terminal and makes the W terminal to be grounded, and the voltage difference V EW between the E terminal and the W terminal is greater than the write threshold V W-TH .
  • the voltage of the node 510 between the gate of the first MOS capacitor 501 and the gate of the second MOS capacitor 502 is relatively high. As a result, electrons flow into the node 510 and are stored at the node 510. Even if the voltage difference between the E terminal and the W terminal is removed, the NMOSFET 503 remains in a high threshold status as the node 510 stores electrons having negative charges.
  • the reading and writing unit 304 applies a same voltage both at the E terminal and at the W terminal, and the difference between such voltage and the source voltage of the NMOSFET 503 is greater than the write threshold V W-TH .
  • the voltage of the node 510 is relatively high, and electrons flow into the node 510 and are stored at the node 510. Even if the voltage at the E terminal and at the W terminal is removed, the NMOSFET 503 remains in a high threshold status as the node 510 stores electrons having negative charges.
  • the reading and writing unit 304 applies a high voltage on the W terminal and makes the E terminal to be grounded, and the voltage difference V WE between the W terminal and the E terminal is greater than the write threshold V W-TH . Because the area of the first MOS capacitor 501 is much greater than the area of the second MOS capacitor 502 and the capacitance of the first MOS capacitor 501 is much greater than the capacitance of the second MOS capacitor 502, the voltage of the node 510 between the gate of the first MOS capacitor 501 and the gate of the second MOS capacitor 502 is relatively low.
  • the structure of the memory unit 401 described above enables the memory unit 401 to remain its status after the write operation.
  • a current source 512 is connected to the drain of the NMOSFET 503 (the connection point is labeled as C in FIG. 5 ), and a voltage between a turn-on voltage of the high threshold status and a turn-on voltage of the low threshold status is applied both at the E terminal and at the W terminal. If the NMOSFET 503 is in a high threshold status, then the NMOSFET 503 is off. The voltage of the node C is pulled to a high level by the current source 512, and the status of output terminal C' of an inverter 514 coupled to the node C is in a low level. That is, the output terminal C' of the inverter 514 outputs a logical "0".
  • the NMOSFET 503 is in a low threshold status, then the NMOSFET 503 is on.
  • the voltage of the node C is at a low level, and the status of the output terminal C' of the inverter 514 coupled to the node C is at a high level. That is, the output terminal C' of the inverter 514 outputs a logical "1".
  • a logical "0" is written to the memory unit 401.
  • a logical "0" is written to the memory unit 401.
  • a logical "1" is written to the memory unit 401.
  • the data stored in the memory unit 401 can be read from the node C via the inverter 514.
  • FIG. 6 shows a flowchart illustrating an operation of a light source driving circuit, in accordance with one embodiment of the present invention.
  • FIG. 6 is described in combination with FIGs.1- 3 .
  • Step 602 the power switch 104 is turned on for the first time.
  • Step 604 the reading and writing unit 304 reads the data stored in the memory module 308 and generates a first control signal DRV1 and a second control signal DRV2 accordingly, so as to set the light source module 130 to a corresponding mode.
  • Step 606 the power switch 104 is turned off.
  • Step 608, judging whether the power switch 104 is turned on within a preset time period. If yes, go to step 610, the reading and writing unit 304 writes a count value of the counter 312 to the memory module 308.
  • Step 612 the reading and writing unit 304 reads the data stored in the memory module 308 and sets the light source module 130 to a corresponding mode.
  • Step 614 the power switch 614 is turned off.
  • Step 616 the count value of the count 312 increases by 1 and the flowchart goes to step 608.
  • step 608 if the power switch 104 is not turned on within the preset time period after turned off, the flowchart goes to step 618 to judge whether the voltage at the switch monitoring terminal VDD decreases to a turn-off threshold. If no, the flowchart goes to step 620 where the power switch 314 is turned on and then the flowchart further goes to step 604. If yes, the flowchart goes to step 622, the count value of the counter 312 is reset to the default value (e.g., 0). Then the flowchart goes to step 602.
  • FIG. 7 shows a diagram illustrating an operation of a light source driving circuit, in accordance with one embodiment of the present invention.
  • FIG. 7 is described in combination with FIGs.1- 3 and FIG. 6 .
  • FIG.7 shows the status of the power switch 104, the voltage at the switch monitoring terminal VDD of the controller 110, the write enable signal W_EN, the read enable signal R_EN, the clamp signal CLAMP, the trigger signal DIMCLK, the regulating signal DIMSTATE, the count value of the counter 312 and the status of the light source module 130.
  • the power switch 104 shows the voltage at the switch monitoring terminal VDD of the controller 110, the write enable signal W_EN, the read enable signal R_EN, the clamp signal CLAMP, the trigger signal DIMCLK, the regulating signal DIMSTATE, the count value of the counter 312 and the status of the light source module 130.
  • the power switch 104 is turned on at time t 0 , turned off at time t 1 , turned on at time t 2 , turned off at time t 3 , turned on at time t 4 , turned off at time t 5 , and turned on at time t 6 .
  • a time interval T1 between time t 1 and time t 2 , a time interval T2 between time t 3 and time t 4 , and a time interval T3 between time t 5 and time t 6 are all less than a preset time period T SET .
  • the voltage at the switch monitoring terminal VDD increases to Viand the power supply unit 306 provides a voltage greater than the write threshold V W-TH for the reading and writing unit 304 to allow the reading and writing unit 304 to write to the memory module 308.
  • the logic unit 310 outputs a write enable signal W_EN in a first status (e.g., at a high level) at time t W1 which is later than time t 0 .
  • the regulating signal DIMSTATE is in an initial status (e.g., at a low level), so the reading and writing unit 304 does not write to the memory module 308.
  • the logic unit 310 outputs the read enable signal R_EN in a first status (e.g., at a high level), the reading and writing unit 304 reads the data from the memory module 308 to generate the first control signal DRV1 and the second control signal DRV2.
  • the logic unit 310 outputs the clamp signal CLAMP in the first status (e.g., at a high level) to the power supply unit 306, which accordingly clamps the voltage at the switch monitoring terminal VDD to the second voltage V2 to enable the components associated with dimming function in the controller 110 to turn on the light source module 130.
  • the first voltage V1 is greater than the second voltage V2.
  • the power supply unit 306 first allows the voltage at the switch monitoring terminal VDD to increase to the first voltage V1 to allow write operation to the memory module 308, and then clamps (decreases) the voltage at the switch monitoring terminal VDD to the second voltage V2.
  • the second voltage V2 is a voltage that can enable the components associated with dimming function in the controller 110 to operable normally to turn on the light source module 130.
  • the mode of the light source module 130 can be mode A or mode B or mode C, depending on the data read from the memory module 308 by the reading and writing unit 304.
  • the switch power 104 is turned on for the second time at time t 2 , and the voltage at the switch monitoring terminal VDD increases to V1.
  • the power supply unit 306 provides a voltage greater than the write threshold V W-TH for the reading and writing unit 304 to allow the reading and writing unit 304 to write to the memory module 308. Because the voltage of the switch monitoring terminal VDD increases to the first voltage V1, the logic unit 310 outputs a write enable signal W_EN in a first status (e.g., at a high level) at time t W2 which is later than time t 2 .
  • the regulating signal DIMSTATE is in the first status (e.g., at a high level), so the reading and writing unit 304 writes the count value "1" of the counter 312 to the memory module 308 and stores as "01" in binary format in the memory module 308.
  • the logic unit 310 outputs the read enable signal R_EN in the first status (e.g., at a high level), and the reading and writing unit 304 reads the data "01" from the memory module 308 to generate the first control signal DRV1 and the second control signal DRV2.
  • the logic unit 310 outputs the clamp signal CLAMP in the first status (e.g., at a high level) to the power supply unit 306, which accordingly clamps the voltage at the switch monitoring terminal VDD to the second voltage V2 to enable the components associated with dimming function in the controller 110 to turn on the light source module 130.
  • the light source module 130 is set to mode A after turned on.
  • the switch power 104 is turned off at time t 3 and time t 5 , the count value of the counter 312 increases by 1 in response to the trigger signal DIMCLK. Therefore, when the power switch 104 is turned on at time t 4 and time t 6 , the mode of the light source module 130 is mode B and mode C, respectively.
  • FIG. 8 shows a diagram illustrating an operation of a light source driving circuit, in accordance with one embodiment of the present invention.
  • FIG. 8 is described in combination with FIGs.1- 3 and FIG. 6 .
  • the power switch 104 is turned on at time t 0 ', turned off at time t 1 ', turned on at time t 2 ', turned off at time t 3 ', turned on at time t 4 ', turned off at time t 5 ', and turned on at time t 6 '.
  • a time interval T1' between time t 1 ' and time t 2 ' and a time interval T2' between time t 3 ' and time t 4 ' are both less than the present time period T SET .
  • the operation of the light source driving circuit from time t 0 ' to time t 5 ' is similar to operation from time t 0 to time t 5 described in FIG. 7 .
  • a time interval T3' between time t 5 ' and time t 6 ' is greater than the present time period T SET .
  • the regulating signal DIMSTATE is reset to the initial status (e.g., at a low level). Accordingly when the power switch 104 is turned on at the time t 6 ', the reading and writing unit 304 does not write to the memory module 308.
  • the data stored in the memory module 308 is the count value "2", which is written into the memory module 308 after the power switch 104 is turned on at time t 4 '.
  • the count value is read out by the reading and writing unit 304. Therefore, when the power switch 104 is turned on at the time t 6 ' and the light source module 130 is turned on, the mode of the light source module 130 still remains at mode B. Besides, referring to step 618 of FIG. 6 , if the time interval T3' is long enough which allows the voltage at the switch monitoring terminal VDD to decrease below the turn-off threshold, the count value of the counter 312 is reset to the default value 0.
  • FIG. 9 shows a flowchart of a method for controlling power of a light source module, in accordance with one embodiment of the present invention.
  • the light source module includes a first light source and a second light source.
  • FIG. 9 is described in combination with FIGs.1- 3 .
  • Step 902 receiving electric power from the power source 102 and powering the light source module 130 by using the controller 110.
  • Step 904 reading data stored in the memory module 308 by using the reading and writing unit 304.
  • Step 906 generating a first control signal based on the data stored in the memory module 308 to turn on or turn off the first light source 111 and generating a second control signal based on the data stored in the memory module 308 to turn on or turn off the second light source 112 by the controller 110.
  • the present invention discloses a controller for controlling a light source module, a light source driving circuit and a method for controlling a light source module.
  • the present invention can adjust the mode of the light source module by ordinary power switch to realize the adjustment of the color or brightness of the light source module. Without the need of using additional dimming devices, the cost is saved.
  • the mode of the light source module can be memorized by the memory module integrated in the controller.

Landscapes

  • Circuit Arrangement For Electric Light Sources In General (AREA)
EP18194489.3A 2018-04-18 2018-09-14 Steuergerät, lichtquellenansteuerungsschaltung und verfahren zur steuerung eines lichtquellenmoduls Withdrawn EP3557946A1 (de)

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