EP3559761A1 - Circuit électronique conçu pour un appareil de terrain de technique d'automation - Google Patents

Circuit électronique conçu pour un appareil de terrain de technique d'automation

Info

Publication number
EP3559761A1
EP3559761A1 EP17804864.1A EP17804864A EP3559761A1 EP 3559761 A1 EP3559761 A1 EP 3559761A1 EP 17804864 A EP17804864 A EP 17804864A EP 3559761 A1 EP3559761 A1 EP 3559761A1
Authority
EP
European Patent Office
Prior art keywords
processor
algorithm
verification
opcode
machine instructions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP17804864.1A
Other languages
German (de)
English (en)
Inventor
Stefan RÜMMELE-WERNER
Thomas Zieringer
Lars KARWECK
Eric Schmitt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Endress and Hauser SE and Co KG
Original Assignee
Endress and Hauser SE and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Endress and Hauser SE and Co KG filed Critical Endress and Hauser SE and Co KG
Publication of EP3559761A1 publication Critical patent/EP3559761A1/fr
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Program-control systems
    • G05B19/02—Program-control systems electric
    • G05B19/04—Program control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Program control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0428—Safety, monitoring
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/24—Pc safety
    • G05B2219/24024—Safety, surveillance
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/24—Pc safety
    • G05B2219/24188—Redundant processors run different programs
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/24—Pc safety
    • G05B2219/24195—Compare data in channels at timed intervals, for equality
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/25—Pc structure of the system
    • G05B2219/25428—Field device

Definitions

  • the invention relates to an electronic circuit for a field device of automation technology and method for checking a first digital processor.
  • Measuring devices or sensors such as level gauges, flowmeters, pressure and temperature measuring devices, pH redox potential measuring devices, conductivity measuring devices, etc., which record the corresponding process variables level, flow, pressure, temperature, pH value or conductivity, are used to record process variables.
  • actuators such as valves or pumps, through which the flow of a liquid in a pipe section or the level can be changed in a container.
  • Sensor circuitry is used in field devices to process raw readings. For example, a process variable in the form of raw measured values is recorded via an analog electrical converter element and the analog raw measured values are digitized via an analog-to-digital converter in order then to be able to further process the digitized raw measured values by means of an algorithm using a digital processor. In this case, a series of operations with the raw measured values can be carried out via the digital processor. For example, a
  • Temperature compensation of the raw measured values are carried out so as to obtain a temperature-compensated digital output signal in the form of measured values.
  • Field device provided so that an error of the field device does not go unnoticed. This includes, for example, the certification of field devices according to the so-called SIL standard of the international standard IEC 61508 for functional safety.
  • diagnostic measures in the form of redundant hardware and / or software are generally used for the highest possible error detection and the proportion of so-called safe failures (SFF).
  • SFF safe failures
  • another digital processor is located next to the digital processor of the sensor electronics for further processing of the digitized raw measured values in the field device. On this further processor also runs off the algorithm, on the basis of which the raw measured values are further processed.
  • the other processor the same input data as the processor of the sensor electronics are supplied, so that the output data of the other
  • Processor should correspond to the output data of the processor of the sensor electronics. In this way, a simple comparison of the two output data can be made and thus the processor of the
  • the object is achieved by an electronic circuit according to independent claim 1 and a method for checking a first digital processor according to independent claim 8.
  • the object is achieved by an electronic circuit for a field device of automation technology, which has the following:
  • a first digital processor in particular a signal processor, having a first set of machine instructions adapted to execute an algorithm running on the processor to calculate a measurement based on raw measurements, the first processor for executing the algorithm comprising at least part of the first set of Machine instructions, wherein the first processor is further configured to execute a test algorithm to calculate output data based on input data, the test algorithm being divided into at least one of
  • the first processor is arranged to at least a part of the algorithm, preferably the entire algorithm, between the
  • Machine instructions of the part of the first set of machine instructions used to execute the algorithm uses a second digital processor, in particular a microprocessor, with a second set of machine instructions for executing at least one verification algorithm, the second one
  • the input data and the output data of the first processor are supplied and the second processor is adapted to execute the verification algorithm to calculate based on the input data supplied verification data, wherein the verification algorithm for calculating the verification data on the at least a part, preferably all Machine instructions of the portion of the first set of machine instructions used to execute the algorithm use corresponding machine instructions of the second set, the verification algorithm being hard-coded in the second processor such that the Verification algorithm does not have to be written in the second processor when starting the field device, and wherein the electronic circuit, in particular the second processor, is set up based on the calculated by the first processor output data and the calculated by the second processor
  • Verification data to perform a review of the first processor.
  • the algorithm which is set up for calculating a measured value on the basis of raw measured values is not used for checking on the second processor, but rather the test algorithm running on the first processor and the corresponding one on the second
  • the test algorithm calculates output data that is compared to verification data.
  • the verification algorithm checks all machine instructions of the part of the first set of machine instructions used to execute the algorithm on the first processor.
  • the verification algorithm serves, so to speak, as a "unit algorithm", by the manufacturer for all electronic circuits to be produced, regardless of whether different algorithms on each
  • the verification algorithm does not have to be transmitted from the first to the second processor, as is done according to the prior art. Rather, the verification algorithm is hard coded on the second processor, i. stored in a non-volatile memory area associated with the second processor. This can be done, for example, in the manufacture of the electronic circuit, so that the manufacturer in the manufacture of electronic circuits always the
  • Verification algorithm as a "unit algorithm” plays on the second processor or stores in the associated memory, regardless of whether different algorithms are used on the circuits produced in each case.
  • test algorithm By dividing the test algorithm into at least two sections and executing the algorithm between the sections, when executed on the first processor additionally be ensured that the
  • An advantageous embodiment of the electronic circuit according to the invention provides that the first and / or second processor to
  • test algorithm and / or the verification algorithm has fewer steps to perform than the algorithm for calculating the measured value.
  • the electronic circuit provides that the electronic circuit is adapted to generate changing, in particular time-varying input data for the test algorithm and the first
  • the embodiment can provide that the electronic circuit is furthermore set up so that the first processor and the second processor use the raw measured values or values derived therefrom as input data for the test algorithm or the verification algorithm or that the electronic circuit is further configured to that the first one
  • Processor and the second processor use a random signal as input data for the test algorithm or the verification algorithm or that the electronic circuit is further configured so that the first processor and the second processor use a counter signal as input data for the test algorithm and the verification algorithm.
  • the object is achieved by a method for
  • Machine instructions of the first processor is accessed
  • Test algorithm on the first processor wherein at least a part of the algorithm, preferably the entire algorithm, between the beginning portion and the end portion of the test algorithm is executed by the first processor, wherein by the
  • Test algorithm based on input data output data, wherein for calculating the output data at least a part, preferably all, machine instructions of the part of the first set of machine instructions used to execute the algorithm are used;
  • Verification algorithm on the second processor in particular a microprocessor, wherein the verification algorithm based on the input data verification data are calculated, for calculating the verification data that at least a part, preferably all, machine instructions of the part of the first set of machine instructions used to execute the algorithm are used, corresponding machine instructions of the second set, wherein the verification algorithm is hard-coded in the second processor, so that the verification algorithm does not have to be written when starting the field device in the second processor; Checking, in particular cyclical checking, the first processor based on the output data calculated by the first processor and the verification data calculated by the second processor.
  • an advantageous embodiment of the method according to the invention provides that the input data is time-varying data, in particular data of a counter or a random number generator or data of the
  • test algorithm is divided into a plurality of sections, but at least a start section and an end section, and executed during the execution of the algorithm at least partially, preferably completely, between the start section and the end section.
  • a further advantageous embodiment of the method according to the invention provides that during execution of the test algorithm and / or
  • Verification algorithm less steps are executed by the first and / or second processor, as would be necessary in the execution of the algorithm for calculating the measured value.
  • FIG. 1 shows a schematic block diagram of a field device with an electronic circuit known from the prior art
  • FIG. 2 shows a schematic block diagram of an embodiment of a field device, which is an inventively arranged electronic
  • Circuit comprises.
  • the field device 100 illustrated in FIG. 1 comprises an electronic circuit, which is composed of a sensor module 10 and a main electronic module 20, and a digital communication interface 16, 24 which is complementary to one another.
  • the sensor module 10 comprises a transducer element 1 1, for example, a capacitive or resistive working pressure transducer element, and a
  • Sensor electronics 12 wherein raw measured values in the form of a primary signal from the transducer element to an analog sensor input 14 of
  • Sensor electronics 12 digitized and then by a first digital processor 1, for example a digital signal processor, by means of an expiring on this processor 1 algorithm Comp in corresponding
  • Measured values further processed or prepared. Typically, a temperature compensation of the raw measured value takes place by means of the algorithm Comp running on the digital signal processor 1.
  • the processed measured value is the first via a digital communication interface 16
  • the main electronics module 20 comprises in the illustrated
  • Embodiment a logic unit, a current regulator 32, a HART modem 34 and a communication interface, for example.
  • the logic unit 22 includes a second digital processor, such as a microprocessor, a second digital communication interface 24, which communicates with the first digital communication interface 16 , By way of example, the digital measured value is transmitted via this digital communication interface during normal measuring operation, and the logic unit 22 causes the current regulator 32 via a third digital signal
  • Communication interface 26 the current sink 36 to regulate so that it provides an analog current signal that represents the digital measurement or a derived measure.
  • the logic unit 22 comprises a fourth digital
  • the electronic circuits known from the prior art are set up in such a way that on the first processor 1 the algorithm Comp is used, at least in part, for the first processor 1 for the first processor 1 Available machine commands is executed. In order to meet the aforementioned SIL measures, the algorithm Comp has also been applied to the second processor 2. This calculates below
  • the verification data V obtained by the second processor 2 are then compared with the output data A obtained by the first processor 1 to obtain a
  • FIG. 2 shows a schematic block diagram of an exemplary embodiment of a field device, which comprises an electronic circuit configured according to the invention.
  • the field device 100 shown in FIG. 1 and in particular also the electronic circuit essentially correspond to the exemplary embodiment from FIG. 1 with regard to their physical configuration.
  • the first processor 1 is set up in such a way that both the algorithm Comp and a test algorithm Opcode run on it with the aid of at least part of the machine instructions of the first processor 1.
  • the test algorithm Opcode is used to calculate output data A based on input data E. It is designed in such a way that it uses all the machine commands or all the opcodes which are required to execute the algorithm Comp at least once.
  • the test algorithm Opcode is subdivided into at least one start section OPCT1 and one end section OPCT2, and the first processor 1 is set up in such a way that at least a part of the
  • Algorithm Comp preferably the entire algorithm Comp between the initial section OPCT1 and the end section OPCT2 is executed. It is also conceivable that the test algorithm Opcode and the algorithm Comp are each subdivided into a plurality of sections C1... Cn or S1... Sn and the first processor 1 alternately executes a part of the test algorithm and then a part of the actual algorithm until the entire algorithm or test algorithm has passed through.
  • time-varying data can be used as input data E for the test algorithm Opcode.
  • the from the transducer element 1 1 derived raw or value derived therefrom will be used.
  • a random signal for example a random signal generated by a random generator, or a
  • the second processor 2 is arranged such that on this one
  • Verification algorithm OPCT with the help of at least part of the machine instructions of the second processor 2 expires.
  • Verification algorithm OPCT serves as well as the test algorithm Opcode that based on the supplied output data A, as
  • Input data are used, verification data V are calculated. It is designed in such a way that it accesses corresponding machine instructions of the second processor 2 for at least a portion thereof, preferably all machine instructions needed to execute the algorithm Comp on the first processor 1. In essence, the equivalent
  • Processor is adapted and preferably not divided into sections on the second computer.
  • the test algorithm and / or the verification algorithm have fewer steps to perform than the actual algorithm Comp.
  • the electronic circuit is further adapted to the output data calculated by the first processor based on the test algorithm and that by the second processor based on the verification algorithm

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Calibration Of Command Recording Devices (AREA)

Abstract

L'invention concerne un circuit électronique conçu pour un appareil de terrain de technique d'automation, comprenant un premier processeur numérique (1) comprenant un premier ensemble d'instructions machine servant à l'exécution d'un algorithme (Comp) exécuté sur le processeur (1), ce premier processeur (1) étant conçu pour exécuter un algorithme d'essai (Opcode) pour calculer des données de sortie (A), ledit algorithme d'essai (Opcode) conçu pour calculer les données de sortie (A) utilisant au moins une partie, de préférence l'intégralité des instructions machine de la partie du premier ensemble d'instructions machine utilisées pour l'exécution de l'algorithme (Comp), un deuxième processeur numérique (2) comprenant un deuxième ensemble d'instructions machine servant à l'exécution d'au moins un algorithme de vérification (OPCT), ce deuxième processeur (2) étant conçu pour exécuter l'algorithme de vérification (OPCT) pour calculer des données de vérification (V). Le circuit électronique, en particulier le deuxième processeur (2), est conçu pour effectuer une inspection du premier processeur (1) au moyen des données de sortie (A) calculées par le premier processeur (1) et des données de vérification (V) calculées par le deuxième processeur (2).
EP17804864.1A 2016-12-21 2017-11-22 Circuit électronique conçu pour un appareil de terrain de technique d'automation Ceased EP3559761A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102016125240.9A DE102016125240A1 (de) 2016-12-21 2016-12-21 Elektronische Schaltung für ein Feldgerät der Automatisierungstechnik
PCT/EP2017/080066 WO2018114193A1 (fr) 2016-12-21 2017-11-22 Circuit électronique conçu pour un appareil de terrain de technique d'automation

Publications (1)

Publication Number Publication Date
EP3559761A1 true EP3559761A1 (fr) 2019-10-30

Family

ID=60480302

Family Applications (1)

Application Number Title Priority Date Filing Date
EP17804864.1A Ceased EP3559761A1 (fr) 2016-12-21 2017-11-22 Circuit électronique conçu pour un appareil de terrain de technique d'automation

Country Status (5)

Country Link
US (1) US20200183350A1 (fr)
EP (1) EP3559761A1 (fr)
CN (1) CN110268342A (fr)
DE (1) DE102016125240A1 (fr)
WO (1) WO2018114193A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3653428A1 (fr) * 2018-11-19 2020-05-20 B&R Industrial Automation GmbH Procédé de surveillance sûre du fonctionnement d'un moteur linéaire à stator long
ES3048616T3 (en) * 2019-09-27 2025-12-11 Siemens Schweiz Ag Method for automatically logging in a user to a field device and an automation system
DE102020119297A1 (de) * 2020-07-22 2022-01-27 Endress+Hauser SE+Co. KG Verfahren zum Überwachen eines ersten Prozessors eines Sensormoduls durch einen zweiten Prozessor
DE102021109398A1 (de) * 2021-04-14 2022-10-20 Endress+Hauser SE+Co. KG Verfahren zum Überprüfen eines Signalpfades einer elektronischen Sensorschaltung für ein Feldgerät der Automatisierungstechnik

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10361465A1 (de) * 2003-12-23 2005-08-11 Endress + Hauser Gmbh + Co. Kg Prozessmessgerät mit erweiterter Hardwarefehlererkennung
DE102005037230A1 (de) * 2005-08-08 2007-02-15 Robert Bosch Gmbh Verfahren und Vorrichtung zur Überwachung von Funktionen eines Rechnersystems
DE102007054672A1 (de) * 2007-11-14 2009-05-20 Endress + Hauser Gmbh + Co. Kg Feldgerät zur Bestimmung oder Überwachung einer Prozessgröße in der Prozessautomatisierung
DE102009019087A1 (de) * 2009-04-20 2010-11-11 Pilz Gmbh & Co. Kg Sicherheitssteuerung und Verfahren zum Steuern einer automatisierten Anlage
DE102009054943A1 (de) * 2009-12-18 2011-06-22 SB LiMotive Company Ltd., Kyonggi Stromsensor mit Selbsttestfunktion
DE102011007467A1 (de) * 2010-04-28 2011-11-03 Continental Teves Ag & Co. Ohg Mehrkernige integrierte Mikroprozessorschaltung mit Prüfeinrichtung, Prüfverfahren und Verwendung
DE102014101945A1 (de) * 2013-12-23 2015-06-25 Endress + Hauser Gmbh + Co. Kg Messumformer mit Überwachungsfunktion
DE102014014858B4 (de) * 2014-10-06 2020-09-03 Audi Ag Steuergerät für ein Kraftfahrzeug, Kraftfahrzeug und Verfahren zum abgesicherten Durchführen einer Funktion
CN104535949A (zh) * 2014-11-30 2015-04-22 国网河南省电力公司电力科学研究院 一种电能质量监测装置现场校验的方法和系统
WO2016138956A1 (fr) * 2015-03-05 2016-09-09 Siemens Aktiengesellschaft Commande à l'épreuve des erreurs pour une installation automatisée

Also Published As

Publication number Publication date
US20200183350A1 (en) 2020-06-11
DE102016125240A1 (de) 2018-06-21
CN110268342A (zh) 2019-09-20
WO2018114193A1 (fr) 2018-06-28

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