Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/80—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
  • H04N19/82—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation involving filtering within a prediction loop
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
  • H04N19/103—Selection of coding mode or of prediction mode
  • H04N19/105—Selection of the reference unit for prediction within a chosen coding or prediction mode, e.g. adaptive choice of position and number of pixels used for prediction
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
  • H04N19/117—Filters, e.g. for pre-processing or post-processing
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
  • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
  • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
  • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
  • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
  • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
  • H04N19/51—Motion estimation or motion compensation
  • H04N19/577—Motion compensation with bidirectional frame interpolation, i.e. using B-pictures

Definitions

• a decoder may obtain a plurality of prediction blocks based on a current inter coding block; obtain a current template of the current inter coding block, wherein the current template includes a plurality of reconstructed samples neighboring to the current inter coding block; obtain a plurality of template predictions of the current template respectively corresponding to the plurality of prediction blocks of the current inter coding block; obtain at least one filter based on the plurality of template predictions and the current template; and obtain a filtered block based on the at least one filter and the plurality of prediction blocks.
• FIG.1A is a block diagram illustrating a system for encoding and decoding video blocks in accordance with some examples of the present disclosure.
• FIG.1B is a block diagram of an encoder in accordance with some examples of the present disclosure.
• FIGS. 1C-1F are block diagrams illustrating how a frame is recursively partitioned into multiple video blocks of different sizes and shapes in accordance with some examples of the present disclosure.
• FIG. 1A is a block diagram illustrating a system for encoding and decoding video blocks in accordance with some examples of the present disclosure.
• FIG.1B is a block diagram of an encoder in accordance with some examples of the present disclosure.
• FIGS. 1C-1F are block diagrams illustrating how a frame is recursively partitioned into multiple video blocks of different sizes and shapes in accordance with some examples of the present disclosure.
• FIG.1A is a block diagram illustrating a system for encoding and decoding video blocks in accordance with some examples of the present disclosure.
• FIG. 1G is a block diagram illustrating an exemplary video encoder in accordance with some examples of the present disclosure
• FIG.2A is a block diagram of a decoder in accordance with some examples of the present disclosure.
• FIG. 2B is a block diagram illustrating an exemplary video decoder in accordance with some examples of the present disclosure.
• FIG. 3A is a diagram illustrating block partitions in a multi-type tree structure in accordance with some examples of the present disclosure.
• FIG. 3B is a diagram illustrating block partitions in a multi-type tree structure in accordance with some examples of the present disclosure.
• FIG. 3A is a diagram illustrating block partitions in a multi-type tree structure in accordance with some examples of the present disclosure.
• FIG. 3B is a diagram illustrating block partitions in a multi-type tree structure in accordance with some examples of the present disclosure.
• FIG. 3C is a diagram illustrating block partitions in a multi-type tree structure in accordance with some examples of the present disclosure.
• FIG. 3D is a diagram illustrating block partitions in a multi-type tree structure in accordance with some examples of the present disclosure.
• FIG.3E is a diagram illustrating block partitions in a multi-type tree structure in accordance with some examples of the present disclosure.
• FIG. 4 shows one example where dx and dy are the horizontal and vertical values of the MV in accordance with some examples of the present disclosure.
• FIG.5 shows an example where one MV has one fractional value and interpolation filters are applied to generate the corresponding prediction samples at fractional sample positions in accordance with some examples of the present disclosure.
• FIG.6 shows examples of two diamond filter shapes in accordance with some examples of the present disclosure.
• FIG.7 shows a subsampled 1-D Laplacian calculation applied for gradient calculations in all the directions in accordance with some examples of the present disclosure.
• FIG.8 is a diagram illustrating local illumination compensation (LIC) for uni-prediction in accordance with some examples of the present disclosure.
• FIG. 9A and 9B are diagrams illustrating the generation of the LIC template prediction samples for affine mode in accordance with some examples of the present disclosure.
• FIG.10 is a block diagram of video encoding with the adaptive filtering for bi-prediction in accordance with some examples of the present disclosure.
• FIG.11 is a block diagram of video decoding with the adaptive filtering for bi-prediction in accordance with some examples of the present disclosure.
• FIG.12 is a diagram illustrating the adaptive motion compensated filtering based on the bi-prediction samples of template in accordance with some examples of the present disclosure.
• FIG.13 is a diagram illustrating the adaptive motion compensated filtering based on the uni-prediction samples of template in accordance with some examples of the present disclosure.
• FIG.14 is a diagram illustrating a computing environment coupled with a user interface in accordance with some examples of the present disclosure.
• FIG.15 is a flowchart illustrating a method for video decoding according to an example of the present disclosure.
• FIG.16 is a flowchart illustrating a method for video decoding according to an example of the present disclosure.
• FIG.17 is a flowchart illustrating a method for video encoding according to an example of the present disclosure.
• FIG.18 is a flowchart illustrating a method for video encoding according to an example of the present disclosure.
• DETAILED DESCRIPTION [0041]
• references throughout this specification to “one embodiment,” “an embodiment,” “an example,” “some embodiments,” “some examples,” or similar language means that a particular feature, structure, or characteristic described is included in at least one embodiment or example. Features, structures, elements, or characteristics described in connection with one or some embodiments are also applicable to other embodiments, unless expressly specified otherwise.
• the terms “first,” “second,” “third,” etc. are all used as nomenclature only for references to relevant elements, e.g., devices, components, compositions, steps, etc., without implying any spatial or chronological orders, unless expressly specified otherwise.
• a “first device” and a “second device” may refer to two separately formed devices, or two parts, components, or operational states of a same device, and may be named arbitrarily.
• the terms “module,” “sub-module,” “circuit,” “sub-circuit,” “circuitry,” “sub-circuitry,” “unit,” or “sub-unit” may include memory (shared, dedicated, or group) that stores code or instructions that can be executed by one or more processors.
• a module may include one or more circuits with or without stored code or instructions.
• the module or circuit may include one or more components that are directly or indirectly connected. These components may or may not be physically attached to, or located adjacent to, one another.
• a method may include steps of: i) when or if condition X is present, function or action X’ is performed, and ii) when or if condition Y is present, function or action Y’ is performed.
• the method may be implemented with both the capability of performing function or action X’, and the capability of performing function or action Y’.
• the functions X’ and Y’ may both be performed, at different times, on multiple executions of the method.
• FIG.1A is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel in accordance with some implementations of the present disclosure. As shown in FIG. 1A, the system 10 includes a source device 12 that generates and encodes video data to be decoded at a later time by a destination device 14.
• the source device 12 and the destination device 14 may include any of a wide variety of electronic devices, including desktop or laptop computers, tablet computers, smart phones, set-top boxes, digital televisions, cameras, display devices, digital media players, video gaming consoles, video streaming device, or the like. In some implementations, the source device 12 and the destination device 14 are equipped with wireless communication capabilities. [0049] In some implementations, the destination device 14 may receive the encoded video data to be decoded via a link 16.
• the link 16 may include any type of communication medium or device capable of moving the encoded video data from the source device 12 to the destination device 14. In one example, the link 16 may include a communication medium to enable the source device 12 to transmit the encoded video data directly to the destination device 14 in real time.
• the encoded video data may be modulated according to a communication standard, such as a wireless communication protocol, and transmitted to the destination device 14.
• the communication medium may include any wireless or wired communication medium, such as a Radio Frequency (RF) spectrum or one or more physical transmission lines.
• the communication medium may form part of a packet-based network, such as a local area network, a wide-area network, or a global network such as the Internet.
• the communication medium may include routers, switches, base stations, or any other equipment that may be useful to facilitate communication from the source device 12 to the destination device 14.
• the encoded video data may be transmitted from an output interface 22 to a storage device 32.
• the encoded video data in the storage device 32 may be accessed by the destination device 14 via an input interface 28.
• the storage device 32 may include any of a variety of distributed or locally accessed data storage media such as a hard drive, Blu-ray discs, Digital Versatile Disks (DVDs), Compact Disc Read-Only Memories (CD-ROMs), flash memory, volatile or non-volatile memory, or any other suitable digital storage media for storing the encoded video data.
• the storage device 32 may correspond to a file server or another intermediate storage device that may hold the encoded video data generated by the source device 12.
• the destination device 14 may access the stored video data from the storage device 32 via streaming or downloading.
• the file server may be any type of computer capable of storing the encoded video data and transmitting the encoded video data to the destination device 14.
• Exemplary file servers include a web server (e.g., for a website), a File Transfer Protocol (FTP) server, Network Attached Storage (NAS) devices, or a local disk drive.
• the destination device 14 may access the encoded video data through any standard data connection, including a wireless channel (e.g., a Wireless Fidelity (Wi-Fi) connection), a wired connection (e.g., Digital Subscriber Line (DSL), cable modem, etc.), or a combination of both that is suitable for accessing encoded video data stored on a file server.
• Wi-Fi Wireless Fidelity
• DSL Digital Subscriber Line
• cable modem etc.
• the transmission of the encoded video data from the storage device 32 may be a streaming transmission, a download transmission, or a combination of both.
• the source device 12 includes a video source 18, a video encoder 20 and the output interface 22.
• the video source 18 may include a source such as a video capturing device, e.g., a video camera, a video archive containing previously captured video, a video feeding interface to receive video from a video content provider, and/or a computer graphics system for generating computer graphics data as the source video, or a combination of such sources.
• a video capturing device e.g., a video camera, a video archive containing previously captured video
• a video feeding interface to receive video from a video content provider
• a computer graphics system for generating computer graphics data as the source video, or a combination of such sources.
• the source device 12 and the destination device 14 may form camera phones or video phones.
• the captured, pre-captured, or computer-generated video may be encoded by the video encoder 20.
• the encoded video data may be transmitted directly to the destination device 14 via the output interface 22 of the source device 12.
• the encoded video data may also (or alternatively) be stored onto the storage device 32 for later access by the destination device 14 or other devices, for decoding and/or playback.
• the output interface 22 may further include a modem and/or a transmitter.
• the destination device 14 includes the input interface 28, a video decoder 30, and a display device 34.
• the input interface 28 may include a receiver and/or a modem and receive the encoded video data over the link 16.
• the encoded video data communicated over the link 16, or provided on the storage device 32 may include a variety of syntax elements generated by the video encoder 20 for use by the video decoder 30 in decoding the video data. Such syntax elements may be included within the encoded video data transmitted on a communication medium, stored on a storage medium, or stored on a file server.
• the destination device 14 may include the display device 34, which can be an integrated display device and an external display device that is configured to communicate with the destination device 14.
• the display device 34 displays the decoded video data to a user, and may include any of a variety of display devices such as a Liquid Crystal Display (LCD), a plasma display, an Organic Light Emitting Diode (OLED) display, or another type of display device.
• LCD Liquid Crystal Display
• OLED Organic Light Emitting Diode
• the video encoder 20 and the video decoder 30 may operate according to proprietary or industry standards, such as VVC, HEVC, MPEG-4, Part 10, AVC, or extensions of such standards. It should be understood that the present application is not limited to a specific video encoding/decoding standard and may be applicable to other video encoding/decoding standards. It is generally contemplated that the video encoder 20 of the source device 12 may be configured to encode video data according to any of these current or future standards.
• the video decoder 30 of the destination device 14 may be configured to decode video data according to any of these current or future standards.
• the video encoder 20 and the video decoder 30 each may be implemented as any of a variety of suitable encoder and/or decoder circuitry, such as one or more microprocessors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), discrete logic, software, hardware, firmware or any combinations thereof.
• DSPs Digital Signal Processors
• ASICs Application Specific Integrated Circuits
• FPGAs Field Programmable Gate Arrays
• FIGS. 3A-3E are schematic diagrams illustrating multi-type tree splitting modes in accordance with some implementations of the present disclosure.
• the video block again is or may be regarded as a two-dimensional array or matrix of samples with sample values, although of smaller dimension than the video frame.
• a number of samples in horizontal and vertical directions (or axes) of the video block define a size of the video block.
• the video block may further be partitioned into one or more block partitions or sub-blocks (which may form again blocks) by, for example, iteratively using QT partitioning, Binary-Tree (BT) partitioning or Triple- Tree (TT) partitioning or any combination thereof.
• BT Binary-Tree
• TT Triple- Tree partitioning or any combination thereof.
• block or “video block” as used herein may be a portion, in particular a rectangular (square or non- square) portion, of a frame or a picture.
• the block or video block may be or correspond to a Coding Tree Unit (CTU), a CU, a Prediction Unit (PU) or a Transform Unit (TU) and/or may be or correspond to a corresponding block, e.g., a Coding Tree Block (CTB), a Coding Block (CB), a Prediction Block (PB) or a Transform Block (TB) and/or to a sub-block.
• CTU Coding Tree Block
• PU Prediction Unit
• TU Transform Unit
• a corresponding block e.g., a Coding Tree Block (CTB), a Coding Block (CB), a Prediction Block (PB) or a Transform Block (TB) and/or to a sub-block.
• CTB Coding Tree Block
• PB Prediction Block
• TB Transform Block
• Intra BC unit 48 may calculate ratios from the distortions and rates for the various encoded blocks to determine which intra-prediction mode exhibits the best rate-distortion value for the block. [0077] In other examples, the intra BC unit 48 may use the motion estimation unit 42 and the motion compensation unit 44, in whole or in part, to perform such functions for Intra BC prediction according to the implementations described herein. In either case, for Intra block copy, a predictive block may be a block that is deemed as closely matching the block to be coded, in terms of pixel difference, which may be determined by SAD, SSD, or other difference metrics, and identification of the predictive block may include calculation of values for sub-integer pixel positions.
• the video encoder 20 may form a residual video block by subtracting pixel values of the predictive block from the pixel values of the current video block being coded, forming pixel difference values.
• the pixel difference values forming the residual video block may include both luma and chroma component differences.
• the intra prediction processing unit 46 may intra-predict a current video block, as an alternative to the inter-prediction performed by the motion estimation unit 42 and the motion compensation unit 44, or the intra block copy prediction performed by the intra BC unit 48, as described above. In particular, the intra prediction processing unit 46 may determine an intra prediction mode to use to encode a current block.
• the entropy encoding unit 56 may perform the scan. [0082] Following quantization, the entropy encoding unit 56 entropy encodes the quantized transform coefficients into a video bitstream using, e.g., Context Adaptive Variable Length Coding (CAVLC), Context Adaptive Binary Arithmetic Coding (CABAC), Syntax-based context- adaptive Binary Arithmetic Coding (SBAC), Probability Interval Partitioning Entropy (PIPE) coding or another entropy encoding methodology or technique.
• CAVLC Context Adaptive Variable Length Coding
• CABAC Context Adaptive Binary Arithmetic Coding
• SBAC Syntax-based context- adaptive Binary Arithmetic Coding
• PIPE Probability Interval Partitioning Entropy
• the encoded bitstream may then be transmitted to the video decoder 30 as shown in FIG.1A, or archived in the storage device 32 as shown in FIG.1A for later transmission to or retrieval by the video decoder 30.
• the entropy encoding unit 56 may also entropy encode the motion vectors and the other syntax elements for the current video frame being coded.
• the inverse quantization unit 58 and the inverse transform processing unit 60 apply inverse quantization and inverse transformation, respectively, to reconstruct the residual video block in the pixel domain for generating a reference block for prediction of other video blocks.
• the motion compensation unit 44 may generate a motion compensated predictive block from one or more reference blocks of the frames stored in the DPB 64.
• the motion compensation unit 82 may generate prediction data based on motion vectors received from the entropy decoding unit 80, while the intra-prediction unit 84 may generate prediction data based on intra-prediction mode indicators received from the entropy decoding unit 80.
• a unit of the video decoder 30 may be tasked to perform the implementations of the present application.
• the implementations of the present disclosure may be divided among one or more of the units of the video decoder 30.
• the intra BC unit 85 may perform the implementations of the present application, alone, or in combination with other units of the video decoder 30, such as the motion compensation unit 82, the intra prediction unit 84, and the entropy decoding unit 80.
• the video decoder 30 may not include the intra BC unit 85 and the functionality of intra BC unit 85 may be performed by other components of the prediction processing unit 81, such as the motion compensation unit 82.
• the video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by the other components of the video decoder 30.
• the video data stored in the video data memory 79 may be obtained, for example, from the storage device 32, from a local video source, such as a camera, via wired or wireless network communication of video data, or by accessing physical data storage media (e.g., a flash drive or hard disk).
• the video data memory 79 may include a Coded Picture Buffer (CPB) that stores encoded video data from an encoded video bitstream.
• the DPB 92 of the video decoder 30 stores reference video data for use in decoding video data by the video decoder 30 (e.g., in intra or inter predictive coding modes).
• the video data memory 79 and the DPB 92 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including Synchronous DRAM (SDRAM), Magneto- resistive RAM (MRAM), Resistive RAM (RRAM), or other types of memory devices.
• DRAM dynamic random access memory
• SDRAM Synchronous DRAM
• MRAM Magneto- resistive RAM
• RRAM Resistive RAM
• the video data memory 79 and the DPB 92 are depicted as two distinct components of the video decoder 30 in FIG.2B.
• the video data memory 79 and the DPB 92 may be provided by the same memory device or separate memory devices.
• the video data memory 79 may be on-chip with other components of the video decoder 30, or off-chip relative to those components.
• the video decoder 30 receives an encoded video bitstream that represents video blocks of an encoded video frame and associated syntax elements.
• the video decoder 30 may receive the syntax elements at the video frame level and/or the video block level.
• the entropy decoding unit 80 of the video decoder 30 entropy decodes the bitstream to generate quantized coefficients, motion vectors or intra-prediction mode indicators, and other syntax elements.
• the entropy decoding unit 80 then forwards the motion vectors or intra-prediction mode indicators and other syntax elements to the prediction processing unit 81.
• the intra prediction unit 84 of the prediction processing unit 81 may generate prediction data for a video block of the current video frame based on a signaled intra prediction mode and reference data from previously decoded blocks of the current frame.
• the motion compensation unit 82 of the prediction processing unit 81 produces one or more predictive blocks for a video block of the current video frame based on the motion vectors and other syntax elements received from the entropy decoding unit 80.
• Each of the predictive blocks may be produced from a reference frame within one of the reference frame lists.
• the video decoder 30 may construct the reference frame lists, List 0 and List 1, using default construction techniques based on reference frames stored in the DPB 92.
• the intra BC unit 85 of the prediction processing unit 81 produces predictive blocks for the current video block based on block vectors and other syntax elements received from the entropy decoding unit 80.
• the predictive blocks may be within a reconstructed region of the same picture as the current video block defined by the video encoder 20.
• the motion compensation unit 82 and/or the intra BC unit 85 determines prediction information for a video block of the current video frame by parsing the motion vectors and other syntax elements, and then uses the prediction information to produce the predictive blocks for the current video block being decoded.
• the motion compensation unit 82 uses some of the received syntax elements to determine a prediction mode (e.g., intra or inter prediction) used to code video blocks of the video frame, an inter prediction frame type (e.g., B or P), construction information for one or more of the reference frame lists for the frame, motion vectors for each inter predictive encoded video block of the frame, inter prediction status for each inter predictive coded video block of the frame, and other information to decode the video blocks in the current video frame.
• a prediction mode e.g., intra or inter prediction
• an inter prediction frame type e.g., B or P
• construction information for one or more of the reference frame lists for the frame e.g., motion vectors for each inter predictive encoded video block of the frame, inter prediction status for each inter predictive coded video block of the frame, and other information to decode the video blocks in the current video frame.
• the intra BC unit 85 may use some of the received syntax elements, e.g., a flag, to determine that the current video block was predicted using the intra BC mode, construction information of which video blocks of the frame are within the reconstructed region and should be stored in the DPB 92, block vectors for each intra BC predicted video block of the frame, intra BC prediction status for each intra BC predicted video block of the frame, and other information to decode the video blocks in the current video frame.
• the motion compensation unit 82 may also perform interpolation using the interpolation filters as used by the video encoder 20 during encoding of the video blocks to calculate interpolated values for sub-integer pixels of reference blocks.
• the motion compensation unit 82 may determine the interpolation filters used by the video encoder 20 from the received syntax elements and use the interpolation filters to produce predictive blocks.
• the inverse quantization unit 86 inverse quantizes the quantized transform coefficients provided in the bitstream and entropy decoded by the entropy decoding unit 80 using the same quantization parameter calculated by the video encoder 20 for each video block in the video frame to determine a degree of quantization.
• the inverse transform processing unit 88 applies an inverse transform, e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process, to the transform coefficients in order to reconstruct the residual blocks in the pixel domain.
• the summer 90 reconstructs decoded video block for the current video block by summing the residual block from the inverse transform processing unit 88 and a corresponding predictive block generated by the motion compensation unit 82 and the intra BC unit 85.
• An in-loop filter 91 such as deblocking filter, SAO filter and/or ALF may be positioned between the summer 90 and the DPB 92 to further process the decoded video block.
• the in-loop filter 91 may be omitted, and the decoded video block may be directly provided by the summer 90 to the DPB 92.
• the decoded video blocks in a given frame are then stored in the DPB 92, which stores reference frames used for subsequent motion compensation of next video blocks.
• the DPB 92, or a memory device separate from the DPB 92 may also store decoded video for later presentation on a display device, such as the display device 34 of FIG.1A.
• motion information of the current coding block is either copied from spatial or temporal neighboring blocks specified by a merge candidate index or obtained by explicit signaling of motion estimation.
• the focus of the present disclosure is to improve the accuracy of the motion vectors for affine merge mode by improving the derivation methods of affine merge candidates.
• a video sequence typically includes an ordered set of frames or pictures. Each frame may include three sample arrays, denoted SL, SCb, and SCr.
• SL is a two-dimensional array of luma samples.
• SCb is a two-dimensional array of Cb chroma samples.
• SCr is a two-dimensional array of Cr chroma samples.
• a frame may be monochrome and therefore includes only one two-dimensional array of luma samples.
• the video encoder 20 (or more specifically a partition unit in a prediction processing unit of the video encoder 20) generates an encoded representation of a frame by first partitioning the frame into a set of CTUs.
• a video frame may include an integer number of CTUs ordered consecutively in a raster scan order from left to right and from top to bottom.
• Each CTU is a largest logical coding unit and the width and height of the CTU are signaled by the video encoder 20 in a sequence parameter set, such that all the CTUs in a video sequence have the same size being one of 128 ⁇ 128, 64 ⁇ 64, 32 ⁇ 32, and 16 ⁇ 16. But it should be noted that the present application is not necessarily limited to a particular size. As shown in FIG. 1D, each CTU may include one CTB of luma samples, two corresponding coding tree blocks of chroma samples, and syntax elements used to code the samples of the coding tree blocks.
• the derived filter coefficients are applied to modify the original bi-prediction signal of the current block as [00142] where are the bi-prediction samples before and after the proposed adaptive filtering is applied. Additionally, to further improve the coding gain, one offset and certain non-linear terms may be introduced when deriving the filter coefficients in the proposed method, which can further reduce the distortion between the template samples and its prediction samples.
• one bi-predictive LIC is proposed which is operated as follows: 1) generating the bi- prediction prediction samples of the template as shown in (10); 2) deriving the scaling factor and the offset using the template samples and their corresponding bi-prediction samples as [00146] where ⁇ and ⁇ are the scaling factor and the offset of the LIC linear model; N is the number of template samples involved in the derivation.
• the final bi-prediction of the current block is generated as Adaptive bi-prediction filtering based on template uni-directional samples [00147]
• one adaptive bi-prediction filtering scheme is proposed using the uni-prediction samples of the template for one bi-predicted block.
• two adaptive filter operations are applied to the prediction samples of the template in one unilateral manner: two sets of filter coefficients are separately derived and applied to prediction samples in L0 and L1; then, the weighted average of the two filtered uni-prediction samples is formed as the final prediction samples of the current block.
• Fig.13 illustrates the proposed scheme. As shown in Fig.13, based on the L0 and L1 MVs, two uni-predictions T 0 and T 1 of the template are generated. Then, based on the separate minimization of the distortions between T 0 and T, and T 1 and T, two sets of filter parameters f 0 and f 1 can be derived for L0 and L1 directions separately, as described as:
• N represents the number of template samples that are involved; T is the template sample of the current block; represents the uni-predictions of the template sample based on the MV (either L0 or L1) of the current block.
• the two filters are applied to two uni-predictions of the current block separately, which are then combined to generate the final bi-prediction of the current blocks as where [00149] where P 0 (x, y) and P 1 (x,y) are the two uni-prediction samples of the current block before the proposed adaptive filtering is applied. Similar to (13) and (14), Additionally, to further improve the coding gain, offset and non-linear terms can be introduced when deriving the filter coefficients. With such modification, the filter coefficients are derived as
• the filtered uni-prediction samples of the current block are calculated as [00151]
• one bi-predictive LIC is proposed which is operated as follows: 1) generating the two uni-predictions of the template; 2) deriving the two sets of scaling factors and the offsets using the template samples and their corresponding uni-prediction samples as [00152] where ⁇ 0 and ⁇ 0 are the scaling factor and the offset of the LIC linear model for L0 uni-prediction, and ⁇ 1 and ⁇ 1 are the scaling factor and the offset of the LIC linear model for L1 uni-prediction; N is the number of template samples involved in the derivation.
• the final bi-prediction of the current block is generated as [00153] where w 0 and w 1 are the BCW weight applied to the current block.
• different methods are proposed to decide the number of iterations that is applied in the proposed algorithm.
• one method it is proposed to use one fixed number of iterations (i.e., 3) at both encoder and decoder.
• the second method it is proposed to give the encoder the freedom to select the specific number of iterations and signal the corresponding value to decoder.
• new syntax element(s) may be added in sequence parameter set (SPS), picture parameter set (PPS), picture header, slice header, or even coding block level to indicate the value of the applied iterations.
• SPS sequence parameter set
• PPS picture parameter set
• picture header picture header
• slice header or even coding block level to indicate the value of the applied iterations.
• the third method it is proposed to adaptively determine the value of iterations that is applied to one block according to its statistics. e.g., sample variation, motion vector difference and extra.
• SAD sum absolute difference
• SSD sum squared difference
• the processor 1420 typically controls overall operations of the computing environment 1410, such as the operations associated with the display, data acquisition, data communications, and image processing.
• the processor 1420 may include one or more processors to execute instructions to perform all or some of the steps in the above-described methods.
• the processor 1420 may include one or more modules that facilitate the interaction between the processor 1420 and other components.
• the processor may be a Central Processing Unit (CPU), a microprocessor, a single chip machine, a GPU, or the like.
• the memory 1440 is configured to store various types of data to support the operation of the computing environment 1410. Memory 1440 may include predetermine software 1442.
• the memory 1440 may be implemented by using any type of volatile or non-volatile memory devices, or a combination thereof, such as a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, a magnetic or optical disk.
• SRAM static random access memory
• EEPROM electrically erasable programmable read-only memory
• EPROM erasable programmable read-only memory
• PROM programmable read-only memory
• ROM read-only memory
• magnetic memory a magnetic memory
• flash memory a flash memory
• magnetic or optical disk a magnetic or optical disk.
• Step 1502 the processor 1420 may obtain a current template of the current inter coding block, wherein the current template includes a plurality of reconstructed samples neighboring to the current inter coding block, as shown in Fig.12.
• Step 1503 the processor 1420 may obtain a plurality of template predictions of the current template respectively corresponding to the plurality of prediction blocks of the current inter coding block. For example, as shown in equation (11) and Fig.12, template predictions T 0 (Template prediction 0) and T1 (Template prediction 1) are obtained as the L0 and L1 prediction samples of the template T, respectively.
• each template prediction may include a plurality of template prediction samples corresponding to the plurality of reconstructed samples of the current template.
• the processor 1420 may obtain at least one filter based on the plurality of template predictions and the current template.
• the processor 1420 may obtain a filtered block based on the at least one filter and the plurality of prediction blocks.
• the processor 1420 may obtain a combined template prediction based on the plurality of template predictions; and obtain coefficients of one filter by minimizing differences between the combined template prediction and the current template.
• combined template prediction T bi can be obtained based on template predictions T 0 (Template prediction 0) and T 1 (Template prediction 1), and then coefficients f ⁇ of the filter can be obtained based on Tbi.
• the processor 1420 may obtain a combined prediction block based on the plurality of prediction blocks; and obtain a filtered block by applying the one filter to the combined prediction block.
• the processor 1420 may obtain a first prediction block and a second prediction block. For example, as shown in Fig.12, two prediction blocks P0 (Prediction block 0) and P 1 (Prediction block 1) are obtained. In some embodiments, more than two prediction blocks may be obtained to implement this method. The number of the prediction blocks is not limited to two as shown in some embodiments of the present disclosure. [00181] In some examples, the processor 1420 may obtain first coefficients for a first filter by minimizing differences between a first template prediction and the current template; and obtain second coefficients for a second filter by minimizing differences between a second template prediction and the current template.
• the processor 1420 may obtain a first filtered prediction block by applying the first filter to the first prediction block; obtain a second filtered prediction block by applying the second filter to the second prediction block; and obtain the filtered block by combining the first filtered prediction block and the second filtered prediction block.
• the first coefficients or the second coefficients include at least one of a scaling factor, an offset, and at least one non-linear item.
• 0 is an offset and are non-linear terms
• ⁇ and ⁇ are a scaling factor and an offset.
• the processor 1420 may calculate a target temple based on the current template and a previously filtered template prediction; obtain coefficients for a current filter by minimizing differences between a current template prediction and the target template; and calculate a current filtered template prediction by applying the current filter to the current template prediction.
• target temple is calculated based on the current template T and a previously filtered template prediction
• coefficients for a current filter can be obtained by minimizing differences between a current template prediction and the target template
• equation (28) based on the filter coefficients the current filtered template prediction is calculated.
• the processor 1420 may repeat the above steps shown in equations (26)-(28) to update filter parameters f 0 (first coefficients) and f 1 (second coefficients) alternatively and recursively.
• the processor 1420 may obtain coefficients for a first filter by minimizing differences between a first template prediction and the current template; and calculate the previously filtered template prediction by applying the first filter to the first template prediction. For example, as shown in equation (24), initial filter coefficients is obtained by minimizing the distortion between its uni-prediction and the template T, and then as shown in equation (25), the filtered uni-prediction is calculated based on initial filter coefficients and used as the previously filtered template prediction in equation (26).
• the processor 1420 may obtain a first filtered prediction block by applying a first filter to the first prediction block; obtain a second filtered prediction block by applying a second filter to the second prediction block; and obtain the filtered block by combining the first filtered prediction block and the second filtered prediction block.
• the coefficients include at least one of a scaling factor, an offset, and at least one non-linear item.
• the processor 1420 may, in response to reaching an iteration number, obtain a first filtered prediction block by applying a first filter to the first prediction block, and obtaining a second filtered prediction block by applying a second filter to the second prediction block; and obtaining the filtered block by combining the first filtered prediction block and the second filtered prediction block.
• the iteration number is preset or determined according to differences between the previously filtered template prediction and the current template prediction.
• FIG. 16 is a flowchart illustrating a method for video decoding according to an example of the present disclosure. The method may be implemented for decoding an inter coding block.
• Step 1601 the processor 1420, at the side of a decoder, may obtain a plurality of prediction blocks based on a current inter coding block. For example, as shown in equation (8), prediction blocks can be obtained based on the current block based on the motion vector [00192]
• Step 1602 the processor 1420 may obtain a current template of the current inter coding block; wherein the current template includes a plurality of reconstructed samples neighboring to the current inter coding block.
• Step 1603 the processor 1420 may obtain a plurality of template predictions of the current template respectively corresponding to the plurality of prediction blocks.
• each template prediction may include a plurality of template prediction samples corresponding to the plurality of reconstructed samples of the current template.
• the processor 1420 may obtain one filter based on the plurality of template predictions and the current template. Specifically, the processor 1420 may calculate a target temple based on the current template and a previously filtered template prediction; obtain coefficients for a current filter by minimizing differences between a current template prediction and the target template; and calculate a current filtered template prediction by applying the current filter to the current template prediction. For example, as shown in equation (26), target temple T (k) based on the current template T and a previously filtered template prediction and then as shown in equation (27), coefficients for a current filter can be obtained by minimizing differences between a current template prediction and the target template T (k) .
• the processor 1420 repeats the above steps shown in equations (26)-(28) to update filter parameters f 0 (first coefficients) and f 1 (second coefficients) alternatively and recursively, but only one of the updated filter parameters f 0 (first coefficients) and f 1 (second coefficients) is used to obtain the filtered block.
• the processor 1420 may obtain a filtered block based on the one filter and one of the plurality of prediction blocks.
• the processor 1420 may obtain coefficients for a first filter by minimizing differences between a first template prediction and the current template; and calculate the previously filtered template prediction by applying the first filter to the first template prediction.
• the coefficients include at least one of a scaling factor, an offset, and at least one non-linear item. For example, as shown in equation (24), initial filter coefficients is obtained by minimizing the distortion between its uni-prediction and the template T, and then as shown in equation (25), the filtered uni-prediction is calculated based on initial filter coefficients and used as the previously filtered template prediction in equation (26).
• the processor 1420 may obtain the filtered block based on the current filter and the one of the plurality of prediction blocks corresponding to the current template prediction.
• the processor 1420 repeats the steps shown in equations (26)- (28) to update filter parameters f 0 (first coefficients) and f 1 (second coefficients) alternatively and recursively, but only one of the filter parameters f 0 (first coefficients) and f 1 (second coefficients) is used as the filter parameter of the current filter, then the filtered block is obtained based on the current filter and the one of the plurality of prediction blocks corresponding to the current template prediction.
• the processor 1420 may, in response to reaching an iteration number, obtain the filtered block based on the current filter and the one of the plurality of prediction blocks corresponding to the current template prediction.
• the iteration number is preset or determined according to differences between the previously filtered template prediction and the current template prediction.
• FIG. 17 is a flowchart illustrating a method for video encoding according to an example of the present disclosure. The method may be implemented for encoding an inter coding block.
• the processor 1420 at the side of an encoder, may obtain a plurality of prediction blocks based on a current inter coding block. For example, as shown in equation (8) and Fig.
• P0 (Prediction block 0) and P1 (Prediction block 1) can be obtained based on the current block based on the motion vector . Both of P 0 and P 1 will be further used to obtain combined prediction block Pbi-pred in equation (9) or Pbi in equation (12). In some embodiments, more than two prediction blocks may be obtained to implement this method. The number of the prediction blocks is not limited to two in some embodiments of the present disclosure.
• the processor 1420 may obtain a current template of the current inter coding block, wherein the current template includes a plurality of reconstructed samples neighboring to the current inter coding block, as shown in Fig.12.
• the processor 1420 may obtain a plurality of template predictions of the current template respectively corresponding to the plurality of prediction blocks of the current inter coding block. For example, as shown in equation (11) and Fig.12, template predictions T 0 (Template prediction 0) and T1 (Template prediction 1) are obtained as the L0 and L1 prediction samples of the template T, respectively. In some embodiments, as shown in Fig.12, each template prediction may include a plurality of template prediction samples corresponding to the plurality of reconstructed samples of the current template. [00204] In Step 1704, the processor 1420 may obtain at least one filter based on the plurality of template predictions and the current template.
• the processor 1420 may obtain a filtered block based on the at least one filter and the plurality of prediction blocks.
• the processor 1420 may obtain a combined template prediction based on the plurality of template predictions; and obtain coefficients of one filter by minimizing differences between the combined template prediction and the current template. For example, as shown in equations (10) and (11) and Fig.12, combined template prediction T bi can be obtained based on template predictions T 0 (Template prediction 0) and T 1 (Template prediction 1), and then coefficients f ⁇ of the filter can be obtained based on Tbi.
• the processor 1420 may obtain a combined prediction block based on the plurality of prediction blocks; and obtain a filtered block by applying the one filter to the combined prediction block. For example, as shown in equation (12) and Fig.12, P 0 (Prediction block 0) and P1 (Prediction block 1) are further used to obtain combined Pbi and then coefficients f ⁇ of the filter is applied to combined prediction block P bi , so that filtered block ) can be obtained.
• the coefficients include at least one of a scaling factor, an offset, and at least one non-linear item.
• the processor 1420 may obtain a first prediction block and a second prediction block. For example, as shown in Fig.12, two prediction blocks P0 (Prediction block 0) and P 1 (Prediction block 1) are obtained. In some embodiments, more than two prediction blocks may be obtained to implement this method. The number of the prediction blocks is not limited to two as shown in some embodiments of the present disclosure.
• the first coefficients or the second coefficients include at least one of a scaling factor, an offset, and at least one non-linear item.
• o is an offset and are non-linear terms
• ⁇ and ⁇ are a scaling factor and an offset.
• the processor 1420 may calculate a target temple based on the current template and a previously filtered template prediction; obtain coefficients for a current filter by minimizing differences between a current template prediction and the target template; and calculate a current filtered template prediction by applying the current filter to the current template prediction.
• target temple T (k) is calculated based on the current template T and a previously filtered template prediction T (k-1) , and then as shown in equation (27), coefficients for a current filter can be obtained by minimizing differences between a current template prediction and the target template T (k) .
• equation (28) based on the filter coefficients the current filtered template prediction ) is calculated.
• the processor 1420 may repeat the above steps shown in equations (26)-(28) to update filter parameters f 0 (first coefficients) and f 1 (second coefficients) alternatively and recursively.
• the processor 1420 may obtain coefficients for a first filter by minimizing differences between a first template prediction and the current template; and calculate the previously filtered template prediction by applying the first filter to the first template prediction. For example, as shown in equation (24), initial filter coefficients is obtained by minimizing the distortion between its uni-prediction and the template T, and then as shown in equation (25), the filtered uni-prediction is calculated based on initial filter coefficients and used as the previously filtered template prediction in equation (26).
• the processor 1420 may obtain a first filtered prediction block by applying a first filter to the first prediction block; obtain a second filtered prediction block by applying a second filter to the second prediction block; and obtain the filtered block by combining the first filtered prediction block and the second filtered prediction block.
• the coefficients include at least one of a scaling factor, an offset, and at least one non-linear item.
• the processor 1420 may, in response to reaching an iteration number, obtain a first filtered prediction block by applying a first filter to the first prediction block, and obtaining a second filtered prediction block by applying a second filter to the second prediction block; and obtaining the filtered block by combining the first filtered prediction block and the second filtered prediction block.
• the iteration number is preset or determined according to differences between the previously filtered template prediction and the current template prediction.
• FIG. 18 is a flowchart illustrating a method for video encoding according to an example of the present disclosure. The method may be implemented for encoding an inter coding block.
• Step 1801 the processor 1420, at the side of an encoder, may obtain a plurality of prediction blocks based on a current inter coding block. For example, as shown in equation (8), prediction blocks can be obtained based on the current block based on the motion vecto [00221]
• the processor 1420 may obtain a current template of the current inter coding block; wherein the current template includes a plurality of reconstructed samples neighboring to the current inter coding block.
• Step 1803 the processor 1420 may obtain a plurality of template predictions of the current template respectively corresponding to the plurality of prediction blocks.
• each template prediction may include a plurality of template prediction samples corresponding to the plurality of reconstructed samples of the current template.
• the processor 1420 may obtain one filter based on the plurality of template predictions and the current template. Specifically, the processor 1420 may calculate a target temple based on the current template and a previously filtered template prediction; obtain coefficients for a current filter by minimizing differences between a current template prediction and the target template; and calculate a current filtered template prediction by applying the current filter to the current template prediction.
• equation (26) target temple T (k) based on the current template T and a previously filtered template prediction and then as shown in equation (27), coefficients for a current filter can be obtained by minimizing differences between a current template prediction and the target template T (k) .
• equation (28) based on the filter coefficients the current filtered template prediction is calculated.
• the processor 1420 repeats the above steps shown in equations (26)-(28) to update filter parameters f 0 (first coefficients) and f 1 (second coefficients) alternatively and recursively, but only one of the updated filter parameters f 0 (first coefficients) and f 1 (second coefficients) is used to obtain the filtered block.
• the processor 1420 may obtain a filtered block based on the one filter and one of the plurality of prediction blocks.
• the processor 1420 may obtain coefficients for a first filter by minimizing differences between a first template prediction and the current template; and calculate the previously filtered template prediction by applying the first filter to the first template prediction.
• the coefficients include at least one of a scaling factor, an offset, and at least one non-linear item.
• the processor 1420 may obtain the filtered block based on the current filter and the one of the plurality of prediction blocks corresponding to the current template prediction.
• the processor 1420 repeats the steps shown in equations (26)- (28) to update filter parameters f 0 (first coefficients) and f 1 (second coefficients) alternatively and recursively, but only one of the filter parameters f 0 (first coefficients) and f 1 (second coefficients) is used as the filter parameter of the current filter, then the filtered block is obtained based on the current filter and the one of the plurality of prediction blocks corresponding to the current template prediction. [00227] In some examples, the processor 1420 may, in response to reaching an iteration number, obtain the filtered block based on the current filter and the one of the plurality of prediction blocks corresponding to the current template prediction.
• the iteration number is preset or determined according to differences between the previously filtered template prediction and the current template prediction.
• an apparatus for video coding includes a processor 1420 and a memory 1440 configured to store instructions executable by the processor; where the processor, upon execution of the instructions, is configured to perform any method as illustrated in FIGS.15-18.
• a non-transitory computer readable storage medium having instructions stored therein. When the instructions are executed by a processor 1420, the instructions cause the processor to perform any method as illustrated in FIGS. 15-18.
• the plurality of programs may be executed by the processor 1420 in the computing environment 1410 to receive (for example, from the video encoder 20 in FIG. 1G) a bitstream or data stream including encoded video information (for example, video blocks representing encoded video frames, and/or associated one or more syntax elements, etc.), and may also be executed by the processor 1420 in the computing environment 1410 to perform the decoding method described above according to the received bitstream or data stream.
• a bitstream or data stream including encoded video information (for example, video blocks representing encoded video frames, and/or associated one or more syntax elements, etc.)
• encoded video information for example, video blocks representing encoded video frames, and/or associated one or more syntax elements, etc.
• the plurality of programs may be executed by the processor 1420 in the computing environment 1410 to perform the encoding method described above to encode video information (for example, video blocks representing video frames, and/or associated one or more syntax elements, etc.) into a bitstream or data stream, and may also be executed by the processor 1420 in the computing environment 1410 to transmit the bitstream or data stream (for example, to the video decoder 30 in FIG.2B).
• video information for example, video blocks representing video frames, and/or associated one or more syntax elements, etc.
• the non-transitory computer-readable storage medium may have stored therein a bitstream or a data stream including encoded video information (for example, video blocks representing encoded video frames, and/or associated one or more syntax elements etc.) generated by an encoder (for example, the video encoder 20 in FIG.1G) using, for example, the encoding method described above for use by a decoder (for example, the video decoder 30 in FIG.2B) in decoding video data.
• the non-transitory computer-readable storage medium may be, for example, a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disc, an optical data storage device or the like.
• the above methods may be implemented using an apparatus that includes one or more circuitries, which include application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, micro-controllers, microprocessors, or other electronic components.
• the apparatus may use the circuitries in combination with the other hardware or software components for performing the above described methods.
• Each module, sub-module, unit, or sub-unit disclosed above may be implemented at least partially using the one or more circuitries.

Landscapes

• Engineering & Computer Science (AREA)
• Multimedia (AREA)
• Signal Processing (AREA)
• Compression Or Coding Systems Of Tv Signals (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=89942233

Family Applications (1)

Country Status (3)

Family Cites Families (4)

• 2023
  • 2023-08-21 WO PCT/US2023/030739 patent/WO2024039910A1/en not_active Ceased
  • 2023-08-21 CN CN202380060727.6A patent/CN119744533A/zh active Pending
  • 2023-08-21 EP EP23855543.7A patent/EP4573751A1/de active Pending

Also Published As

Similar Documents

Legal Events