EP4610835A4 - Speicherverwaltungsverfahren und datenverarbeitungsvorrichtung - Google Patents

Speicherverwaltungsverfahren und datenverarbeitungsvorrichtung

Info

Publication number
EP4610835A4
EP4610835A4 EP23884453.4A EP23884453A EP4610835A4 EP 4610835 A4 EP4610835 A4 EP 4610835A4 EP 23884453 A EP23884453 A EP 23884453A EP 4610835 A4 EP4610835 A4 EP 4610835A4
Authority
EP
European Patent Office
Prior art keywords
data processing
processing device
storage management
management procedures
procedures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP23884453.4A
Other languages
English (en)
French (fr)
Other versions
EP4610835A1 (de
Inventor
shuang Yao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
XFusion Digital Technologies Co Ltd
Original Assignee
XFusion Digital Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by XFusion Digital Technologies Co Ltd filed Critical XFusion Digital Technologies Co Ltd
Publication of EP4610835A1 publication Critical patent/EP4610835A1/de
Publication of EP4610835A4 publication Critical patent/EP4610835A4/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0613—Improving I/O performance in relation to throughput
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1004—Compatibility, e.g. with legacy hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1008—Correctness of operation, e.g. memory ordering
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1048—Scalability
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/22—Employing cache memory using specific memory technology
    • G06F2212/225—Hybrid cache memory, e.g. having both volatile and non-volatile portions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25—Using a specific main memory architecture
    • G06F2212/254—Distributed memory
    • G06F2212/2542—Non-uniform memory access [NUMA] architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Human Computer Interaction (AREA)
  • Bus Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
EP23884453.4A 2022-11-04 2023-09-07 Speicherverwaltungsverfahren und datenverarbeitungsvorrichtung Pending EP4610835A4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202211376351.3A CN115729849B (zh) 2022-11-04 2022-11-04 内存管理方法及计算设备
PCT/CN2023/117464 WO2024093517A1 (zh) 2022-11-04 2023-09-07 内存管理方法及计算设备

Publications (2)

Publication Number Publication Date
EP4610835A1 EP4610835A1 (de) 2025-09-03
EP4610835A4 true EP4610835A4 (de) 2026-02-25

Family

ID=85294584

Family Applications (1)

Application Number Title Priority Date Filing Date
EP23884453.4A Pending EP4610835A4 (de) 2022-11-04 2023-09-07 Speicherverwaltungsverfahren und datenverarbeitungsvorrichtung

Country Status (4)

Country Link
US (1) US20250264998A1 (de)
EP (1) EP4610835A4 (de)
CN (2) CN115729849B (de)
WO (1) WO2024093517A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115729849B (zh) * 2022-11-04 2024-02-20 超聚变数字技术有限公司 内存管理方法及计算设备
CN116881016B (zh) * 2023-09-06 2024-01-19 苏州浪潮智能科技有限公司 服务器进程的处理方法及装置、存储介质及电子设备
CN119883947B (zh) * 2024-12-27 2026-03-13 中国科学院计算技术研究所 数据中心多层次解聚合内存系统

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CN103136110B (zh) * 2013-02-18 2016-03-30 华为技术有限公司 内存管理方法、内存管理装置及numa系统
US9208101B2 (en) * 2013-06-26 2015-12-08 Western Digital Technologies, Inc. Virtual NAND capacity extension in a hybrid drive
CN103488436B (zh) * 2013-09-25 2017-04-26 华为技术有限公司 内存扩展系统及方法
US9959233B2 (en) * 2015-04-28 2018-05-01 Red Hat Israel, Ltd. NUMA-aware root bus selection
CN107102898B (zh) * 2016-02-23 2021-04-30 阿里巴巴集团控股有限公司 一种基于numa架构的内存管理、构建数据结构的方法及装置
US10346091B2 (en) * 2016-03-31 2019-07-09 Intel Corporation Fabric resiliency support for atomic writes of many store operations to remote nodes
CN113312275A (zh) * 2020-02-27 2021-08-27 华为技术有限公司 内存设备的数据处理方法、装置和系统
US20210374056A1 (en) * 2020-05-28 2021-12-02 Samsung Electronics Co., Ltd. Systems and methods for scalable and coherent memory devices
CN115202859A (zh) * 2021-04-08 2022-10-18 华为技术有限公司 一种内存扩展方法以及相关设备
CN113656396B (zh) * 2021-06-28 2024-10-01 清华大学 非统一内存访问架构下的持久性内存索引构建方法
CN114442928B (zh) * 2021-12-23 2023-08-08 苏州浪潮智能科技有限公司 实现dram和pmem之间冷热数据迁移的方法及装置
CN115729849B (zh) * 2022-11-04 2024-02-20 超聚变数字技术有限公司 内存管理方法及计算设备

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
ANONYMOUS: "Samsung Unveils Industry-First Memory Module Incorporating New CXL Interconnect Standard", 11 May 2021 (2021-05-11), XP093352304, Retrieved from the Internet <URL:https://news.samsung.com/global/samsung-unveils-industry-first-memory-module-incorporating-new-cxl-interconnect-standard> [retrieved on 20260112] *
HASAN AL MARUF ET AL: "TPP: Transparent Page Placement for CXL-Enabled Tiered Memory", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 6 June 2022 (2022-06-06), XP091240910, Retrieved from the Internet <URL:https://arxiv.org/pdf/2206.02878v1> [retrieved on 20260109] *
HUAICHENG LI ET AL: "Pond: CXL-Based Memory Pooling Systems for Cloud Platforms", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 13 October 2022 (2022-10-13), XP091343538, Retrieved from the Internet <URL:https://arxiv.org/pdf/2203.00241v3> [retrieved on 20260109] *
RUDOFF ANDY: "Compute Express Link 2.0: A High-Performance Interconnect for Memory Pooling", 28 November 2021 (2021-11-28), XP093351537, Retrieved from the Internet <URL:https://www.snia.org/sites/default/files/2025-05/SNIA-SDC21-Rudoff-CXL-Interconnect-Memory-Pooling.pdf> [retrieved on 20260109] *
See also references of WO2024093517A1 *

Also Published As

Publication number Publication date
EP4610835A1 (de) 2025-09-03
CN118152303A (zh) 2024-06-07
WO2024093517A1 (zh) 2024-05-10
CN115729849A (zh) 2023-03-03
CN115729849B (zh) 2024-02-20
US20250264998A1 (en) 2025-08-21

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