EP4666385A2 - Conversion tension-courant - Google Patents

Conversion tension-courant

Info

Publication number
EP4666385A2
EP4666385A2 EP24706623.6A EP24706623A EP4666385A2 EP 4666385 A2 EP4666385 A2 EP 4666385A2 EP 24706623 A EP24706623 A EP 24706623A EP 4666385 A2 EP4666385 A2 EP 4666385A2
Authority
EP
European Patent Office
Prior art keywords
current
plus
transistor
minus
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP24706623.6A
Other languages
German (de)
English (en)
Inventor
Asad Ali Nawaz
Ibrahim Ramez CHAMAS
Hayg-Taniel Dabag
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US18/449,364 external-priority patent/US20240272661A1/en
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of EP4666385A2 publication Critical patent/EP4666385A2/fr
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45197—Pl types
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/24—Indexing scheme relating to amplifiers the supply or bias voltage or current at the source side of a FET being continuously controlled by a controlling signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/498—A resistor being added in the source circuit of a transistor amplifier stage as degenerating element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21181—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers the supply current of a power amplifier being continuously controlled, e.g. by controlling current sources or resistors

Definitions

  • This disclosure relates generally to signal communication or signal processing using an electronic device and, more specifically, to voltage-to-current conversion.
  • Electronic devices include traditional computing devices such as desktop computers, notebook computers, smartphones, wearable devices like a smartwatch, internet servers, and so forth. Electronic devices also include other types of computing devices such as personal voice assistants (e.g., smart speakers), wireless access points or routers, thermostats and other automated controllers, robotics, automotive electronics, devices embedded in other machines like refrigerators and industrial tools, Internet of Things (loT) devices, medical devices, and so forth. These various electronic devices provide services relating to productivity, communication, social interaction, security, health and safety, remote management, entertainment, transportation, and information dissemination. Thus, electronic devices play crucial roles in modern society.
  • Some electronic communications can thus be realized by propagating signals between two wireless transceivers at two different electronic devices.
  • a smartphone can transmit a wireless signal to a base station over the air as part of an uplink communication to support mobile services.
  • the smartphone can receive a wireless signal that is transmitted from the base station via the air medium as part of a downlink communication to enable mobile services.
  • the base station can also have a wireless transceiver, including a wireless transmitter and a wireless receiver to participate in the wireless communications.
  • mobile services can include making voice and video calls, participating in social media interactions, sending messages, watching movies, sharing videos, performing searches, using map information or navigational instructions, finding friends, engaging in location-based services generally, transferring money, obtaining another service like a car ride, and so forth.
  • a voltage-to-current (V2I) converter or conversion procedure can convert from voltage-mode signaling to currentmode signaling.
  • This voltage-to-current conversion component or procedure can inject nonlinearity or noise, including potentially both nonlinearity and noise, into a currentmode output signal.
  • at least one degeneration resistor can be strategically positioned between an input transistor and a current-source transistor of a voltage-to-current converter. The input transistor can operate as a transconductance device that converts a voltage-mode input signal to the current -mode output signal.
  • the degeneration resistance can redirect at least a portion of a noise-causing signal away from the input transistor.
  • the noise-causing signal may be distributed between plus and minus input transistors using the degeneration resistor to cause at least a portion of the noise to be canceled from the current-mode output signal.
  • the current-source transistor of a voltage-to-current converter can be biased in a triode region instead of a saturation region. In the triode region, the current-source transistor can dynamically respond to changes in voltage by changing (e.g., increasing) current flow. The increased current flow can at least partially balance a current output that is being clipped at the input transistor to increase a linearity of the current-mode output signal.
  • an apparatus for voltage-to-current conversion includes a voltage-to-current converter including a plus input transistor and a minus input transistor.
  • the voltage-to-current converter also includes a plus current-source transistor coupled between the plus input transistor and a power distribution node and a minus current- source transistor coupled between the minus input transistor and the power distribution node.
  • the voltage-to-current converter further includes a plus resistor coupled between the plus input transistor and the plus currentsource transistor and a minus resistor coupled between the minus input transistor and the minus current-source transistor.
  • an apparatus for voltage-to-current conversion includes a voltage-to-current converter including a plus input transistor and a minus input transistor.
  • the voltage-to-current converter also includes a plus current-source transistor coupled between the plus input transistor and a power distribution node and a minus current- source transistor coupled between the minus input transistor and the power distribution node.
  • the voltage-to-current converter further includes means for reducing, in an output signal of the voltage-to-current converter, noise generated by the plus current-source transistor and means for reducing, in the output signal of the voltage-to-current converter, noise generated by the minus current-source transistor.
  • a method for voltage-to-current conversion or operating a voltage-to-current converter includes receiving a voltagemode input signal at an input transistor.
  • the method also includes producing, using the input transistor, a current-mode output signal.
  • the method additionally includes providing, using a current-source transistor, a current to the input transistor.
  • the method further includes splitting noise generated by the current-source transistor between at least a first path including the input transistor and a resistor and a second path including another resistor.
  • FIG. 2 is a schematic diagram illustrating an example radio -frequency (RF) front-end and an example transceiver that can each include at least one voltage-to-current converter.
  • RF radio -frequency
  • the electronic device 102 can include at least one application processor 108 and at least one computer -readable storage medium 110 (CRM 110).
  • the application processor 108 may include any type of processor, such as a central processing unit (CPU) or a multi -core processor, that is configured to execute processor-executable instructions (e.g., code) stored by the CRM 110.
  • the CRM 110 may include any suitable type of data storage media, such as volatile memory (e.g., random-access memory (RAM)), non-volatile memory (e.g., Flash memory), optical media (e.g., a disc), magnetic media (e.g., a disk or tape), and so forth.
  • the CRM 110 is implemented to store instructions 112, data 114, and other information of the electronic device 102, and thus the CRM 110 does not include transitory propagating signals or carrier waves.
  • the wireless interface device 120 can include at least one communication processor 124, at least one transceiver 126, and at least one radiofrequency front-end 128 (RFFE 128). These components process data information, control information, and signals associated with communicating information for the electronic device 102 via the antenna 122.
  • the communication processor 124 may be implemented as at least part of a system-on-chip (SoC), as a modem processor, or as a baseband radio processor (BBP) that enables a digital communication interface for data, voice, messaging, or other applications of the electronic device 102.
  • SoC system-on-chip
  • BBP baseband radio processor
  • the communication processor 124 can include a digital signal processor (DSP) or one or more signal - processing blocks (not shown) for encoding and modulating data for transmission and for demodulating and decoding received data. Additionally, the communication processor 124 may also manage (e.g., control or configure) aspects or operation of the transceiver 126, the RF front-end 128, and other components of the wireless interface device 120 to implement various communication protocols or communication techniques.
  • DSP digital signal processor
  • the communication processor 124 may also manage (e.g., control or configure) aspects or operation of the transceiver 126, the RF front-end 128, and other components of the wireless interface device 120 to implement various communication protocols or communication techniques.
  • the application processor 108 and the communication processor 124 can be combined into one module or integrated circuit (IC), such as an SoC.
  • the application processor 108, the communication processor 124, or a processor generally can be operatively coupled to one or more other components, such as the CRM 110 or the display 118, to enable control of, or other interaction with, the various components of the electronic device 102.
  • at least one processor 108 or 124 can present one or more graphical images on a display screen implementation of the display 118 based on one or more wireless signals communicated (e.g., transmitted or received) via the at least one antenna 122 using components of the wireless interface device 120.
  • the application processor 108 or the communication processor 124 can be realized using digital circuitry that implements logic or functionality that is described herein.
  • the communication processor 124 may also include or be associated with a memory (not separately depicted) to store data and processor-executable instructions (e.g., code), such as the same CRM 110 or another CRM.
  • the wireless interface device 120 can include at least one voltage- to-current converter 130, which is described below. More specifically, the transceiver 126 can include at least one voltage-to-current converter 130-1, or the RF front-end 128 can include at least one voltage-to-current converter 130-2 (including both components can have at least one voltage-to-current converter 130 in accordance with an optional, but permitted herein, “inclusive-or” interpretation of the word “or”). The transceiver 126 can also include circuitry and logic for filtering, switching, amplification, channelization, frequency translation, and so forth.
  • the transceiver 126 can include an analog-to-digital converter (ADC) or a digital -to-analog converter (DAC) (not shown in FIG. 1).
  • ADC analog-to-digital converter
  • DAC digital -to-analog converter
  • an ADC can convert analog signals to digital signals
  • a DAC can convert digital signals to analog signals.
  • an ADC or a DAC can be implemented as part of the communication processor 124, as part of the transceiver 126, or separately from both (e.g., as another part of an SoC or as part of the application processor 108).
  • Configurable components of the RF front-end 128, such as some phase shifters, an automatic gain controller (AGC), or a reconfigurable version of the voltage-to-current converter 130-2, may be controlled by the communication processor 124 to implement communications in various modes, with different frequency bands, using beamforming, to reduce noise or nonlinearity, or to trade-off between noise and nonlinearity.
  • the communication processor 124 can similarly control operation of one or more components of the transceiver 126, such as the voltage-to-current converter 130-1.
  • the antenna 122 is implemented as at least one antenna array that includes multiple antenna elements.
  • an “antenna” can refer to at least one discrete or independent antenna, to at least one antenna array that includes multiple antenna elements, or to a portion of an antenna array (e.g., an antenna element), depending on context or implementation.
  • the at least one degeneration resistor 134 can be positioned so as to distribute a noise-carrying signal in manner(s) that reduce how much of the noise reaches or adversely impacts an output signal of the voltage-to-current converter 130.
  • the current-source transistor 136 can be biased in a triode region so as to compensate for compression in the input transistor 132 in manner(s) that increase a linearity of the output signal of the voltage-to-current converter 130.
  • FIG. 2 is a schematic diagram of circuitry 200 illustrating an example RF front-end 128 and an example transceiver 126 that can each include at least one mixer circuit, which may be preceded by a respective voltage-to-current converter 130.
  • FIG. 2 also depicts an antenna 122 and a communication processor 124.
  • the communication processor 124 communicates one or more data signals to other components, such as the application processor 108 of FIG. 1, for further processing at 224 (e.g., for processing at an application level) for reception operations.
  • the communication processor 124 communicates one or more data signals from other components to the transceiver 126.
  • the antenna 122 is coupled to the RF front-end 128, and the RF front-end 128 is coupled to the transceiver 126.
  • the transceiver 126 is coupled to the communication processor 124.
  • the example RF front-end 128 includes at least one signal propagation path 222.
  • the at least one signal propagation path 222 can include at least one mixer circuit, such as the mixer circuit 208* for frequency down-conversion operations for receptions and the mixer circuit 258* for frequency up-conversion operations for transmissions.
  • the example transceiver 126 includes at least one receive chain 202 (or receive path 202) and at least one transmit chain 252 (or transmit path 252).
  • RF front-end 128, one transceiver 126, and one communication processor 124 are shown at the circuitry 200, an electronic device 102, or a wireless interface device 120 thereof, can include multiple instances of any or all such components. Also, although only certain components are explicitly depicted in FIG. 2 and are shown coupled together in a particular manner, the transceiver 126 or the RF front-end 128 may include other non-illustrated components (e.g., switches or diplexers), more or fewer components, differently coupled arrangements of components, and so forth.
  • non-illustrated components e.g., switches or diplexers
  • the RF front-end 128 couples the antenna 122 to the transceiver 126 via the signal propagation path 222.
  • the signal propagation path 222 carries a signal between the antenna 122 and the transceiver 126.
  • the signal propagation path 222 conditions the propagating signal, such as with the mixer circuit 208* or the mixer circuit 258*. This enables the RF front-end 128 to couple a wireless signal 220 from the antenna 122 to the transceiver 126 as part of a reception operation.
  • the RF front-end 128 also enables a transmission signal to be coupled from the transceiver 126 to the antenna 122 as part of a transmission operation to emanate a wireless signal 220.
  • an RF front-end 128, or a signal propagation path 222 thereof may include one or more other components, such as another mixer, a filter, an amplifier (e.g., a power amplifier (PA) or a low-noise amplifier (LNA)), an N-plexer, a phase shifter, a transformer, a diplexer, at least one voltage-to-current converter 130, one or more switches, and so forth.
  • PA power amplifier
  • LNA low-noise amplifier
  • the transceiver 126 can include at least one receive chain 202, at least one transmit chain 252, or at least one receive chain 202 and at least one transmit chain 252.
  • the receive chain 202 can include a low noise amplifier 204 (LNA 204), a filter circuit 206, a voltage-to-current converter 130-3 (V2IC 130-3), the mixer circuit 208 for frequency down-conversion, and an ADC 210.
  • the transmit chain 252 can include a power amplifier 254 (PA 254), a filter circuit 256, the mixer circuit 258 for frequency up-conversion, the voltage-to-current converter 130-1 (V2IC 130-1), and a DAC 260.
  • the receive chain 202 or the transmit chain 252 can include other components — for example, additional mixers or voltage-to-current converters, multiple filters, at least one transformer, one or more buffers, or at least one phase-locked loop — that are electrically or electromagnetically coupled anywhere along the depicted receive and transmit chains.
  • the receive chain 202 is coupled between the signal propagation path 222 of the RF front-end 128 and the communication processor 124 — e.g., via the low-noise amplifier 204 and the ADC 210, respectively.
  • the transmit chain 252 is coupled between the signal propagation path 222 and the communication processor 124 — e.g., via the power amplifier 254 and the DAC 260, respectively.
  • the transceiver 126 can also include at least one local oscillator 230 (LO 230) that is coupled to the mixer circuit 208 or the mixer circuit 258, including to both mixer circuits.
  • LO 230 local oscillator 230
  • the transceiver 126 can include one local oscillator 230 for each transmit/receive chain pair, one local oscillator 230 per transmit chain and one local oscillator 230 per receive chain, multiple local oscillators 230 per transmit or receive chain, and so forth.
  • Each of the mixer circuit 208* and the mixer circuit 258* of the RF front-end 128 may also be coupled to the same local oscillator 230 or to a different local oscillator (not shown in FIG. 2).
  • the antenna 122 is coupled to the low noise amplifier 204 via the signal propagation path 222 and the mixer circuit 208* thereof, and the low noise amplifier 204 is coupled to the filter circuit 206.
  • the filter circuit 206 is coupled to the voltage-to-current converter 130-3.
  • the voltage-to-current converter 130-3 is coupled to the mixer circuit 208, and the mixer circuit 208 is coupled to the ADC 210.
  • the ADC 210 is in turn coupled to the communication processor 124.
  • an electronic device 102 can include multiple instances of either or both components.
  • the ADC 210 and the DAC 260 are illustrated as being separately coupled to the communication processor 124, they may share a bus or other means for communicating with the processor 124.
  • the mixer circuit 208* (if present) of the signal propagation path 222 down-converts a received signal (e.g., to an intermediate frequency (IF)) and forwards the down-converted signal to the low-noise amplifier 204.
  • the low-noise amplifier 204 accepts the down-converted signal from the RF front-end 128 and provides an amplified signal to the filter circuit 206 based on the accepted signal.
  • the filter circuit 206 filters the amplified signal and provides a filtered signal to the voltage-to-current converter 130-3.
  • the voltage-to-current converter 130-3 converts a filtered voltage-based signal to a current-based signal and provides the currentbased signal to the mixer circuit 208.
  • the mixer circuit 208 performs a frequency down-conversion operation on the filtered current-mode signal to down-convert from one frequency to a lower frequency (e.g., from the IF to a baseband frequency (BBF) if the mixer circuit 208* is present or from a radio frequency (RF) to an IF or BBF in the absence of the mixer circuit 208*).
  • the mixer circuit 208, or multiple mixer circuits can perform the frequency downconversion in a single conversion step or through multiple conversion steps using at least one local oscillator 230.
  • the mixer circuit 208 can provide a down-converted analog signal to the ADC 210 for analog-to-digital conversion and subsequent forwarding to the communication processor 124 as a digital signal by the ADC 210.
  • Example implementations of a voltage-to-current converter 130 may be deployed to precede (from a signal propagation perspective) one or more of the example mixer circuits 208, 258, 208*, or 258* in the transceiver 126 or the RF front-end 128 or at other mixer circuits of an electronic device 102 (not shown in FIG. 2). Nonetheless, one or more voltage-to-current converters can be deployed: in alternative locations along a transmit chain 252 or a receive chain 202, as part of an RF front-end 128, with or without being coupled to an input or an output of a mixer circuit or DAC, in a discrete or integrated form, in other portions of an electronic device, and so forth.
  • a receive chain or a transmit chain may be present in the RF front-end 128, and/or the depicted receive chain 202 or transmit chain 252 may be extended into the RF front-end 128 such that the chain(s) are at least partially distributed across the transceiver 126 and the RF front-end 128.
  • the transmit chain 252 in FIG. 3 depicts dual signaling lines for differential signaling
  • the principles described herein can be employed in single-ended (or unbalanced) signaling environments.
  • Example single-ended circuits are described below with reference to FIGS. 7-1 and 7-2.
  • certain illustrations that depict dual signal lines may be applicable to single-ended implementations, like the schematic diagram 300.
  • certain illustrations that depict single signal lines may be applicable to differential implementations, like the schematic diagram 200 of FIG. 2.
  • FIG. 4-1 is a circuit diagram 400-1 of an example voltage-to-current converter 130 that illustrates an example first aspect 402-1 that can reduce noise in an output signal 406 and an example second aspect 402-2 that can reduce nonlinearity in the output signal 406.
  • An input signal 404 for the voltage-to-current converter 130 is also shown.
  • the input signal 404 includes a plus input signal 404+ and a minus input signal 404-.
  • the output signal 406 includes a plus output signal 406+ and a minus output signal 406-.
  • the voltage-to-current converter 130 receives a voltage-mode input signal 404 and produces a current -mode output signal 406.
  • the voltage-to-current converter 130 includes a plus input transistor 412+, a minus input transistor 412-, a plus current-source transistor 414+ (plus CS transistor 414+), and a minus current-source transistor 414- (minus CS transistor 414-).
  • the voltage-to- current converter 130 also includes a plus resistor 416+, a minus resistor 416-, and a resistor 418 (e.g., a first resistor 418-1 and a second resistor 418-2 in a central or middle degeneration resistor area).
  • the plus current-source transistor 414+ is coupled between the plus input transistor 412+ and a power distribution node 420.
  • the minus current- source transistor 414- is coupled between the minus input transistor 412- and the power distribution node 420.
  • the input transistor 412 can be configured to operate as a transconductance device that converts voltage-mode signaling to current-mode signaling (e.g., the input transistor 412 may be realized as at least one transconductance transistor). Additionally or alternatively, the input transistor 412 can be configured to operate as an amplification device (e.g., the input transistor 412 may be realized as at least one amplification transistor).
  • An amplification transistor may have a gain that can change a voltage level, a current magnitude, or an amplitude of a signal generally. A gain ratio may be less than one, more than one, or one; thus, an amplification transistor may have a unit gain in some circumstances.
  • the power distribution node 420 is shown as a ground; however, a power distribution node can instead be a supply voltage rail (not shown).
  • the current-source transistor 414 can be coupled to a ground (e.g., via a source terminal thereof), and the input transistor 412 can be coupled to a supply voltage rail (e.g., via a drain terminal thereof).
  • the depicted power distribution node 420 that is coupled to the current-source transistors can be a supply voltage rail, and the input transistors can be coupled to a ground via a channel terminal that is opposite to a channel terminal that is coupled to a degeneration resistor.
  • the voltage-to-current converter 130 can include at least one conductive path 424 coupled between the plus input transistor 412+ and the minus input transistor 412- (e.g., between respective channel terminals thereof, such as between respective source terminals as shown).
  • the conductive path 424 can also be coupled between the plus current-source transistor 414+ and the minus current-source transistor 414- (e.g., between respective channel terminals thereof, such as between respective drain terminals as shown for an NMOS implementation).
  • the conductive path 424 can include at least one wire, metal trace, metal layer portion, etc. that can conduct electrical current.
  • the conductive path 424 can include one or more components, such as at least one resistor.
  • the conductive path 424 may include at least one resistor 418, such as a first resistor 418-1 and a second resistor 418-2.
  • the conductive path 424 may, however, include more, fewer, and/or different component s).
  • the resistor 418 can be coupled between the plus current-source transistor 414+ and the minus current-source transistor 414-, such as between respective channel terminals thereof.
  • the resistor 418 can be coupled between a drain terminal of the plus current-source transistor 414+ and a drain terminal of the minus current-source transistor 414- for an example NMOS implementation.
  • the plus resistor 416+ can be coupled between a source terminal of the plus input transistor 412+ and the drain terminal of the plus current-source transistor 414+.
  • the minus resistor 416- can be coupled between a source terminal of the minus input transistor 412- and the drain terminal of the minus current-source transistor 414-.
  • the current-source (CS) transistors can be configured as current sources or operated as current sources. This is indicated at 422+ and 422- where a current source symbol and an associated parasitic resistance are depicted to illustrate an example operational state of the plus current-source transistor 414+ and the minus current-source transistor 414-, respectively. Accordingly, some implementations of the voltage-to- current converter 130 are depicted with at least one current source 422, such as a plus current source 422+ and a minus current source 422-.
  • the “plus input transistor” refers to a transistor that can correspond to a plus portion of a differential signal and that may accept or receive a plus input signal 404+ as part of an operation of the voltage-to- current converter 130.
  • the input transistor 412 may also be referred to as a transconductance transistor or an amplification transistor.
  • a “minus current-source transistor” refers to a transistor that can correspond to a minus portion of the differential signal and that may function as a current source during at least part of the operation of the voltage-to-current converter 130.
  • An input transistor may alternatively be referred to as, e.g., a main transistor, an amplification transistor, or a transconductance transistor.
  • the input transistor may be implemented as a transconductance device that may include at least one transconductance transistor and that may or may not apply a non-unitary gain to an incoming signal.
  • an amplification or transconductance transistor may not provide a gain or may have a unity gain.
  • the plus input transistor and the minus input transistor may instead be referred to as a transistor that is distinguished or differentiated from other transistors using a numerical identifier, for example, as a first transistor and a second transistor, respectively.
  • the plus current-source transistor and the minus current-source transistor may instead be referred to, for example, as a third transistor and a fourth transistor, respectively.
  • FIG. 4-2 is a circuit diagram 400-2 of an example voltage-to-current converter 131 that illustrates an example signal -noise-routing paradigm based on at least one position of at least one degeneration resistor of the depicted voltage-to-current converter 131.
  • FIG. 4-3 is a circuit diagram 400-3 of an example voltage-to-current converter 130 that illustrates another example signal-noise-routing paradigm based on at least one different position of at least one degeneration resistor of the depicted voltage-to-current converter 130 to facilitate understanding the example first aspects 402-1 (of FIG. 4-1) that are described herein.
  • the current sources are represented by noise sources for this noise-related signal analysis.
  • Each voltage-to-current converter includes one or more degeneration resistors.
  • each current flow 453 and 455 is injected into an output signal by noise caused by a current source that is depicted as a noise source 457, which corresponds to the “plus” side of the differential circuit in this example.
  • the current, and thus the noise is appreciably greater in the current flow 453 relative to the noise level of the current flow 455. This is illustrated with noise symbols 459 near each current flow.
  • the current magnitude, and thus amplitudes of the noise as indicated by the noise symbols 474, is noticeably closer between the two current flows 468 and 470 in the voltage-to-current converter 130 relative to the corresponding two noise values as indicated by the noise symbols 459 of the current flows 453 and 455 of the voltage-to- current converter 131 in FIG. 4-2.
  • noise symbols 474 are depicted as being relatively closer in magnitude to each other in FIG. 4-3 as compared to the noise symbols 459 in FIG. 4-2. Accordingly, the two noise levels in the plus and minus portions of the differential output signal of the voltage-to-current converter 130 can cancel out a relatively greater amount of noise when the differential signals are resolved.
  • the noise symbols 459 and 474 are illustrated at certain relative amplitudes by way of example only and are not necessarily depicted to scale.
  • the noise is more evenly distributed or split between the plus and minus portions of the input transistors with the voltage-to-current converter 130 in FIG. 4-3 based on the principles that are described herein for the example first aspects 402-1 (of FIG. 4-1). Due to the common-mode signaling, the split noise levels of the voltage-to-current converter 130 in FIG. 4-3 can cancel each other more as compared to the noise that predominantly flows along a single transistor path with the voltage-to- current converter 131 in FIG. 4-2.
  • a resistor 416+ between the plus input transistor 412+ and the plus current-source transistor or a resistor 416- between the minus input transistor 412- and the minus current-source transistor can reduce an amount of noise that is produced by the voltage-to-current converter 130.
  • these techniques can reduce an amount of noise that may be injected into downstream components of a communication chain, such as a mixer circuit.
  • Example aspect 16 The apparatus of example aspect 15, wherein: the plus resistor is coupled between a channel terminal of the plus input transistor and the channel terminal of the plus current-source transistor; and the minus resistor is coupled between a channel terminal of the minus input transistor and the channel terminal of the minus current-source transistor.
  • Example aspect 17 The apparatus of example aspect 16, wherein: the channel terminal of the plus current-source transistor comprises a drain terminal of the plus current-source transistor; the channel terminal of the minus current-source transistor comprises a drain terminal of the minus current-source transistor; the channel terminal of the plus input transistor comprises a source terminal of the plus input transistor; and the channel terminal of the minus input transistor comprises a source terminal of the minus input transistor.
  • Example aspect 27 An apparatus comprising: a voltage-to-current converter comprising: a plus input transistor; a minus input transistor; a plus current-source transistor coupled between the plus input transistor and a power distribution node; a minus current-source transistor coupled between the minus input transistor and the power distribution node; means for reducing, in an output signal of the voltage-to-current converter, noise generated by the plus current-source transistor; and means for reducing, in the output signal of the voltage -to-current converter, noise generated by the minus current-source transistor.
  • a voltage-to-current converter comprising: a plus input transistor; a minus input transistor; a plus current-source transistor coupled between the plus input transistor and a power distribution node; a minus current-source transistor coupled between the minus input transistor and the power distribution node; means for reducing, in an output signal of the voltage-to-current converter, noise generated by the plus current-source transistor; and means for reducing, in the output signal of the voltage -to-current converter, noise generated by
  • Example aspect 36 The apparatus of example aspect 35 or any other example aspect, wherein the voltage-to-current converter comprises: a plus switch coupled in parallel with the plus adjustable resistor; and a minus switch coupled in parallel with the minus adjustable resistor.
  • Example aspect 46 The apparatus of example aspect 45 or any other example aspect, wherein: the plus resistor is coupled between a source terminal of the plus amplification transistor and the drain terminal of the plus current-source transistor; and the minus resistor is coupled between a source terminal of the minus amplification transistor and the drain terminal of the minus current-source transistor.
  • Example aspect 47 The apparatus of example aspect 31 or any other example aspect, wherein: the plus amplification transistor, the plus resistor, and the plus current-source transistor are coupled together in series between the power distribution node and another power distribution node.
  • Example aspect 48 The apparatus of example aspect 47 or any other example aspect, wherein: the power distribution node comprises a ground; and the other power distribution node comprises a voltage supply rail.
  • Example aspect 49 The apparatus of example aspect 31 or any other example aspect, wherein: the plus amplification transistor is configured to amplify a voltage-mode signal received at a gate terminal of the plus amplification transistor to produce a current -mode signal at a drain terminal of the plus amplification transistor.
  • Example aspect 50 The apparatus of example aspect 31 or any other example aspect, wherein: the plus current-source transistor is configured to be biased in a triode region of transistor operation.
  • Example aspect 51 The apparatus of example aspect 50 or any other example aspect, further comprising: a controller coupled to the voltage-to-current converter, the controller configured to bias the plus current-source transistor in the triode region of transistor operation to reduce nonlinearities in an output signal of the voltage-to-current converter.
  • Example aspect 52 The apparatus of example aspect 31 or any other example aspect, wherein: the plus current-source transistor is configured to operate as a current source with respect to at least the plus amplification transistor.
  • Example aspect 53 The apparatus of example aspect 52 or any other example aspect, wherein the plus current-source transistor is configured to: produce an output current; and adjust the output current dynamically responsive to voltage swings created by the plus amplification transistor.
  • Example aspect 54 The apparatus of example aspect 53 or any other example aspect, wherein the plus current-source transistor is configured to: adjust the output current dynamically to counteract clipping experienced by the plus amplification transistor.
  • Example aspect 55 The apparatus of example aspect 31 or any other example aspect, further comprising: a digital-to-analog converter; a base-band filter coupled between the digital-to-analog converter and the voltage- to-current converter; and a mixer, wherein the voltage-to-current converter is coupled between the mixer and the base-band filter.
  • the terms “couple,” “coupled,” or “coupling” refer to a relationship between two or more components that are in operative communication with each other to implement some feature or realize some capability that is described herein.
  • the coupling can be realized using, for instance, a physical line, such as a metal trace or wire, or an electromagnetic coupling, such as with a transformer.
  • a coupling can include a direct coupling or an indirect coupling.
  • a direct coupling refers to connecting discrete circuit elements via a same node without an intervening element.
  • An indirect coupling refers to connecting discrete circuit elements via one or more other devices or other discrete circuit elements, including two or more different nodes.
  • node (e.g., including a “first node” or a “power distribution network node”) represents at least a point of electrical connection between two or more components (e.g., circuit elements). Although at times a node may be visually depicted in a drawing as a single point, the node can represent a connection portion of a physical circuit or network that has approximately a same voltage potential at or along the connection portion between two or more components. In other words, a node can represent at least one of multiple points along a conducting medium (e.g., a wire or trace) that exists between electrically connected components. Similarly, a “terminal” or “port” may represent one or more points with at least approximately a same voltage potential relative to an input or output of a component (e.g., a transistor).
  • a conducting medium e.g., a wire or trace
  • first, second, third, and other numeric-related indicators are used herein to identify or distinguish similar or analogous items from one another within a given context — such as a particular implementation, a single drawing figure, a given component, or a claim.
  • a first item in one context may differ from a first item in another context.
  • an item identified as a “first amplification transistor” in one context may be identified as a “second amplification transistor” in another context.
  • a “first resistor” or a “first switch” in one claim may be recited as a “second resistor” or a “third switch,” respectively, in a different claim (e.g., in separate claim sets).
  • An analogous interpretation applies to differential -related terms such as a “plus transistor” and a “minus transistor.”

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Transceivers (AREA)
  • Amplifiers (AREA)

Abstract

L'invention divulgue un appareil de conversion tension-courant. Dans des aspects illustratifs, l'appareil comporte un convertisseur tension-courant contenant un transistor d'entrée positive, un transistor d'entrée négative, un transistor à source de courant positive, un transistor à source de courant négative, une résistance positive et une résistance négative. Le transistor à source de courant positive est couplé entre le transistor d'entrée positive et un nœud de distribution d'énergie. Le transistor à source de courant négative est couplé entre le transistor d'entrée négative et le nœud de distribution d'énergie. La résistance positive est couplée entre le transistor d'entrée positive et le transistor de source de courant positive. La résistance négative est couplée entre le transistor d'entrée négative et le transistor de source de courant négative.
EP24706623.6A 2023-02-14 2024-01-17 Conversion tension-courant Pending EP4666385A2 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US202363484918P 2023-02-14 2023-02-14
US18/449,364 US20240272661A1 (en) 2023-02-14 2023-08-14 Voltage-to-Current Conversion
PCT/US2024/011837 WO2024172977A2 (fr) 2023-02-14 2024-01-17 Conversion tension-courant

Publications (1)

Publication Number Publication Date
EP4666385A2 true EP4666385A2 (fr) 2025-12-24

Family

ID=89984720

Family Applications (1)

Application Number Title Priority Date Filing Date
EP24706623.6A Pending EP4666385A2 (fr) 2023-02-14 2024-01-17 Conversion tension-courant

Country Status (4)

Country Link
EP (1) EP4666385A2 (fr)
KR (1) KR20250145595A (fr)
CN (1) CN120604455A (fr)
WO (1) WO2024172977A2 (fr)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5570056A (en) * 1995-06-07 1996-10-29 Pacific Communication Sciences, Inc. Bipolar analog multipliers for low voltage applications
US6229395B1 (en) * 1999-10-01 2001-05-08 Rf Micro Devices, Inc. Differential transconductance amplifier
EP2713507B1 (fr) * 2012-10-01 2014-12-10 Nxp B.V. Détecteur de puissance RF utilisant FET

Also Published As

Publication number Publication date
CN120604455A (zh) 2025-09-05
KR20250145595A (ko) 2025-10-13
WO2024172977A2 (fr) 2024-08-22
WO2024172977A3 (fr) 2024-10-03

Similar Documents

Publication Publication Date Title
US10374554B2 (en) Differential amplifier with complementary unit structure
KR101409915B1 (ko) 수신된 신호로부터 증폭된 수신 신호를 생성하는 장치 및 방법
US11616517B2 (en) Multiband transmitter
US11228292B2 (en) Divided amplifier
US11632098B2 (en) Polyphase filter with interphase coupling
US8868022B2 (en) Broadband transconductance amplifier
CN115065325A (zh) 分路混合器电流传送器
US8526905B2 (en) Merged filter-transconductor-upconverter
US20240272661A1 (en) Voltage-to-Current Conversion
KR101356404B1 (ko) 오프셋 소거를 이용한 하향 변환기 및 그것과 함께 사용하기 위한 방법
EP4666385A2 (fr) Conversion tension-courant
CN106537774A (zh) 用于拒斥近端阻塞源和发射泄漏的架构
US8451046B2 (en) System and method for switch leakage cancellation
US12463669B2 (en) Shared filter for transmission and reception
US10756772B1 (en) Multi-mode mixer
US12255586B2 (en) Oscillator feedthrough calibration
US20250096839A1 (en) Oscillator Leakage Calibration
US11777449B1 (en) Frequency mixing
US20250096742A1 (en) Interstage Clamping Circuit
US20250096751A1 (en) Darlington Circuit with a Driver Amplifier
WO2025064181A1 (fr) Circuit darlington inter-étage
HK1183567A (en) Down converter with offset cancellation and methods for use therewith

Legal Events

Date Code Title Description
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: UNKNOWN

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE

PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20250612

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC ME MK MT NL NO PL PT RO RS SE SI SK SM TR