ES2047010T3 - Procedimiento y disposicion de circuito para el control de un circuito de interfase en serie. - Google Patents

Procedimiento y disposicion de circuito para el control de un circuito de interfase en serie.

Info

Publication number
ES2047010T3
ES2047010T3 ES88116233T ES88116233T ES2047010T3 ES 2047010 T3 ES2047010 T3 ES 2047010T3 ES 88116233 T ES88116233 T ES 88116233T ES 88116233 T ES88116233 T ES 88116233T ES 2047010 T3 ES2047010 T3 ES 2047010T3
Authority
ES
Spain
Prior art keywords
serial interface
procedure
control
microprocessor unit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES88116233T
Other languages
English (en)
Inventor
Josef Fenzl
Karoly Lajtai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wincor Nixdorf International GmbH
Original Assignee
Siemens Nixdorf Informationssysteme AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Nixdorf Informationssysteme AG filed Critical Siemens Nixdorf Informationssysteme AG
Application granted granted Critical
Publication of ES2047010T3 publication Critical patent/ES2047010T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40—Network security protocols

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PARA REDUCIR LA CARGA DE LA UNIDAD DE MICROPROCESADOR (MP) DE UNA INTERFAZ SERIE GOBERNADA POR MICROPROCESADOR POSEE LA INTERFAZ EN EL LADO DE TRANSMISION UN PRIMER DISPOSITIVO ADICIONAL,QUE, EN FUNCION DEL PREAJUSTE POR LA UNIDAD DE MICROPROCESADOR (MP), TRANSMITE, POR UN LADO, UN FLUJO DE BITS DE MANDO Y, POR OTRO, UN FLUJO DE BITS DE DATOS PROCEDENTE DE UN DISPOSITIVO DE CONVERSION SERIE DE FLUJOS DE BITS (BW) O UN FLUJO DE BITS GENERADO POR EL MISMO, GENERANDO AL MISMO TIEMPO SEÑALES DE ALERTA PARA LA UNIDAD DE MICROPROCESADOR (MP), MIENTRAS QUE EL LADO DE RECEPCION POSEE UN SEGUNDO DISPOSITIVO ADICIONAL, QUE, DURANTE UN TIEMPO PREFIJADO, IDENTIFICA VARIACIONES ESTABLES DE LA INFORMACION Y GENERA, DEBIDO A ELLO, UNA SEÑAL DE ALERTA.
ES88116233T 1988-09-30 1988-09-30 Procedimiento y disposicion de circuito para el control de un circuito de interfase en serie. Expired - Lifetime ES2047010T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP88116233A EP0360917B1 (de) 1988-09-30 1988-09-30 Verfahren und Schaltungsanordnung zur Steuerung einer seriellen Schnittstellenschaltung

Publications (1)

Publication Number Publication Date
ES2047010T3 true ES2047010T3 (es) 1994-02-16

Family

ID=8199407

Family Applications (1)

Application Number Title Priority Date Filing Date
ES88116233T Expired - Lifetime ES2047010T3 (es) 1988-09-30 1988-09-30 Procedimiento y disposicion de circuito para el control de un circuito de interfase en serie.

Country Status (5)

Country Link
US (1) US5168556A (es)
EP (1) EP0360917B1 (es)
AT (1) ATE99097T1 (es)
DE (1) DE3886535D1 (es)
ES (1) ES2047010T3 (es)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5153884A (en) * 1990-08-15 1992-10-06 Allen-Bradley Company, Inc. Intelligent network interface circuit
US5598555A (en) * 1993-12-28 1997-01-28 Yamaha Corporation Data transmission apparatus
US6219730B1 (en) * 1998-06-20 2001-04-17 Nghi Nho Nguyen Method and apparatus for producing a combined data stream and recovering therefrom the respective user input stream and at least one additional input signal
EP1133898B1 (en) * 1999-01-25 2002-08-28 Widex A/S Hearing aid system and hearing aid for in-situ fitting
US6718170B1 (en) * 1999-07-01 2004-04-06 Qualcomm Incorporated Dynamic allocation of microprocessor resources in a wireless communication device
US6976769B2 (en) * 2003-06-11 2005-12-20 Cool Options, Inc. Light-emitting diode reflector assembly having a heat pipe
US7551732B2 (en) * 2003-12-08 2009-06-23 Global Tel*Link Corporation Centralized voice over IP recording and retrieval method and apparatus
US7818464B2 (en) * 2006-12-06 2010-10-19 Mosaid Technologies Incorporated Apparatus and method for capturing serial input data
US7796462B2 (en) 2007-02-22 2010-09-14 Mosaid Technologies Incorporated Data flow control in multiple independent port

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4263670A (en) * 1979-05-11 1981-04-21 Universal Data Systems, Inc. Microprocessor data modem
EP0164105A3 (de) * 1984-06-04 1988-01-27 Siemens Aktiengesellschaft Schaltungsanordnung zur Aufnahme und/oder zur Abgabe von seriell auftretenden Binärsignalen in bzw. von einer einen Mikrocomputer bzw. Mikroprozessor enthaltenden Verarbeitungseinrichtung

Also Published As

Publication number Publication date
EP0360917B1 (de) 1993-12-22
EP0360917A1 (de) 1990-04-04
US5168556A (en) 1992-12-01
DE3886535D1 (de) 1994-02-03
ATE99097T1 (de) 1994-01-15

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