ES2049247T3 - Receptor de television que tiene reloj corregido en oblicuidad. - Google Patents
Receptor de television que tiene reloj corregido en oblicuidad.Info
- Publication number
- ES2049247T3 ES2049247T3 ES88302727T ES88302727T ES2049247T3 ES 2049247 T3 ES2049247 T3 ES 2049247T3 ES 88302727 T ES88302727 T ES 88302727T ES 88302727 T ES88302727 T ES 88302727T ES 2049247 T3 ES2049247 T3 ES 2049247T3
- Authority
- ES
- Spain
- Prior art keywords
- circuit
- dividing
- frequency
- fcs
- corrected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
- H04N5/123—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal directly commands a frequency generator
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/93—Regeneration of the television signal or of selected parts thereof
- H04N5/95—Time-base error compensation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/44—Colour synchronisation
- H04N9/45—Generation or recovery of colour sub-carriers
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Processing Of Color Television Signals (AREA)
- Television Signal Processing For Recording (AREA)
- Synchronizing For Television (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Color Television Systems (AREA)
Abstract
RECEPTOR DE TV DIGITAL QUE INCLUYE UN APARATO PARA LA GENERACION DE UN RELOJ CORREGIDO EN DISTORSION. EL APARATO CONSISTE DE UN OSCILADOR CONTINUO, DE FRECUENCIA FIJA (22) PARA PRODUCIR UNA SEÑAL (FFOS) CON UNA FRECUENCIA QUE ES UN MULTIPLO ENTERO K ESTABLECIDO DE LA FRECUENCIA NOMINAL DESEADA DE LA SEÑAL DE RELOJ CORREGIDA EN DISTORSION, Y UN CIRCUITO DE DIVIDIR POR K (30) QUE SE REPONE UNA VEZ EN CADA LINEA HORIZONTAL. EL CIRCUITO DE DIVIDIR POR K COMPRENDE UN CIRCUITO DE DIVIDIR POR M CONECTADO EN SERIE CON UN FLIPFLOP (50), CON DICHO CIRCUITO DE DIVIDIR POR M (40) SE REPONE MEDIANTE UNA PRIMERA SEÑAL DE CONTROL (FCS) UNA VEZ EN CADA LINEA HORIZONTAL. EL APARATO INCLUYE ADICCIONALMENTE MEDIOS (FIG. 2/SCS) PARA PREVENIR LA SALIDA DEL FLIP-FLOP (50) DE CAMBIAR MIENTRAS EL CIRCUITO DE DIVIDIR POR M SE REPONE EN RESPUESTA A LA PRIMERA SEÑAL DE CONTROL (FCS). DE ACUERDO CON OTRO ASPECTO DE ESTA INVENCION, EL ESTADO DEL CIRCUITO DE DIVIDIR POR K (30) SE CAPTURA (150/SES) Y SE SALVA PARA SER USADO EN UN APARATO DE DEMODULACION DE BRILLO (FIG. 6) JUSTO ANTES DE REPONERSE.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/032,258 US4864399A (en) | 1987-03-31 | 1987-03-31 | Television receiver having skew corrected clock |
| US07/032,261 US4772937A (en) | 1987-03-31 | 1987-03-31 | Skew signal generating apparatus for digital TV |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2049247T3 true ES2049247T3 (es) | 1994-04-16 |
Family
ID=26708186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES88302727T Expired - Lifetime ES2049247T3 (es) | 1987-03-31 | 1988-03-28 | Receptor de television que tiene reloj corregido en oblicuidad. |
Country Status (5)
| Country | Link |
|---|---|
| EP (2) | EP0285350B1 (es) |
| JP (1) | JP2663351B2 (es) |
| KR (1) | KR960016566B1 (es) |
| DE (2) | DE3887701T2 (es) |
| ES (1) | ES2049247T3 (es) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102909949B1 (ko) * | 2023-03-28 | 2026-01-08 | 국립금오공과대학교 산학협력단 | 타임 스큐 보정 장치 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4291332A (en) * | 1980-04-10 | 1981-09-22 | Tokyo Shibaura Denki Kabushiki Kaisha | Phase-locked circuit |
| US4463371A (en) * | 1982-05-28 | 1984-07-31 | Rca Corporation | Clock generation apparatus for a digital television system |
| DE3432313A1 (de) * | 1984-09-03 | 1986-03-13 | Philips Patentverwaltung Gmbh, 2000 Hamburg | Schaltungsanordnung zum synchronisieren eines signals |
| US4595953A (en) * | 1984-10-31 | 1986-06-17 | Rca Corporation | Television receiver having character generator with burst locked pixel clock and correction for non-standard video signals |
| US4612568A (en) * | 1984-11-05 | 1986-09-16 | Rca Corporation | Burst-to-line-locked clock digital video signal sample rate conversion apparatus |
| JPH0652943B2 (ja) * | 1985-01-18 | 1994-07-06 | ソニー株式会社 | 映像機器 |
| US4667240A (en) * | 1985-07-31 | 1987-05-19 | Rca Corporation | Timing correction circuitry as for TV signal recursive filters |
| US4638360A (en) * | 1985-09-03 | 1987-01-20 | Rca Corporation | Timing correction for a picture-in-picture television system |
-
1988
- 1988-03-28 EP EP88302727A patent/EP0285350B1/en not_active Expired - Lifetime
- 1988-03-28 ES ES88302727T patent/ES2049247T3/es not_active Expired - Lifetime
- 1988-03-28 DE DE3887701T patent/DE3887701T2/de not_active Expired - Fee Related
- 1988-03-28 EP EP93200689A patent/EP0550420B1/en not_active Expired - Lifetime
- 1988-03-28 DE DE3856375T patent/DE3856375T2/de not_active Expired - Fee Related
- 1988-03-31 KR KR1019880003575A patent/KR960016566B1/ko not_active Expired - Fee Related
- 1988-03-31 JP JP63076678A patent/JP2663351B2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR880012100A (ko) | 1988-11-03 |
| EP0285350A3 (en) | 1989-04-19 |
| EP0285350A2 (en) | 1988-10-05 |
| DE3887701T2 (de) | 1994-08-18 |
| EP0550420A3 (en) | 1993-08-18 |
| JP2663351B2 (ja) | 1997-10-15 |
| EP0285350B1 (en) | 1994-02-09 |
| KR960016566B1 (ko) | 1996-12-14 |
| DE3856375T2 (de) | 2000-02-10 |
| DE3887701D1 (de) | 1994-03-24 |
| EP0550420B1 (en) | 1999-10-27 |
| DE3856375D1 (de) | 1999-12-02 |
| EP0550420A2 (en) | 1993-07-07 |
| JPS63278484A (ja) | 1988-11-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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