ES2090165T3 - Proceso para la formacion de una capa de siliciuro de titanio sobre una oblea semiconductora. - Google Patents

Proceso para la formacion de una capa de siliciuro de titanio sobre una oblea semiconductora.

Info

Publication number
ES2090165T3
ES2090165T3 ES91106070T ES91106070T ES2090165T3 ES 2090165 T3 ES2090165 T3 ES 2090165T3 ES 91106070 T ES91106070 T ES 91106070T ES 91106070 T ES91106070 T ES 91106070T ES 2090165 T3 ES2090165 T3 ES 2090165T3
Authority
ES
Spain
Prior art keywords
oxygen
titanium
silicon
layer
disc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES91106070T
Other languages
English (en)
Inventor
Jaim Nulman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/510,340 external-priority patent/US5043300A/en
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Application granted granted Critical
Publication of ES2090165T3 publication Critical patent/ES2090165T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0452—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers
    • H10P72/0454—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers surrounding a central transfer chamber
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0468—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

SE REVELA UN PROCESO MEJORADO PARA FORMAR UNA CAPA CONDUCTORA DE SILICIURO DE TITANIO EN UN DISCO DE SILICIO SEMICONDUCTOR UTILIZANDO UN UNICO PASO DE RECOCCION QUE INCLUYE LAS ETAPAS DE FORMAR UNA CAPA DE TITANIO SOBRE EL DISCO EN UNA CAMARA DE DEPOSICION AL VACIO EN LA AUSENCIA SUSTANCIAL DE GASES PORTADORES DE OXIGENO; TRANSFERIR EL DISCO REVESTIDO DE TITANIO A UNA CAMARA DE RECOCCION SELLADA SIN EXPONER SUSTANCIALMENTE LA CAPA DE TITANIO FORMADA A LOS GASES PORTADORES DE OXIGENO; Y LUEGO RECOCER EL DISCO DE SILICIO SEMICONDUCTOR REVESTIDO DE TITANIO EN UNA ATMOSFERA PORTADORA DE NITROGENO EN LA CAMARA DE RECOCCION SELLADA A UNA PRIMERA TEMPERATURA ENTRE 500 C Y 695 C APROXIMADAMENTE, CON AUSENCIA SUSTANCIAL DE GASES PORTADORES DE OXIGENO, PARA FORMAR UNA CAPA DE SILICIURO DE TITANIO Y UNA CAPA DE NITRURO DE TITANIO SOBRE EL SILICIURO DE TITANIO QUE INHIBE LA MIGRACION A LA SUPERFICIE DEL SILICIO QUE SIRVE DE BASE, Y PARA HACER REACCIONAR SUSTANCIALMENTE TODAS LAS REGIONES DE OXIDO SILICIO (SIO SUB 2) QUE SIRVE DE BASE AL TITANIO DEL DISCO PARA FORMAR NITRURO DE TITANIO, Y LUEGO AUMENTAR LA TEMPERATURA PARA FORMAR UNA FASE DE SILICIURO DE TITANIO MAS ESTABLE SIN RIESGO DE REACCION ENTRE EL OXIDO DE SILICONA Y EL TITANIO NO REACCIONADO EN EL.
ES91106070T 1990-04-16 1991-04-16 Proceso para la formacion de una capa de siliciuro de titanio sobre una oblea semiconductora. Expired - Lifetime ES2090165T3 (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US50992890A 1990-04-16 1990-04-16
US51030790A 1990-04-16 1990-04-16
US07/510,340 US5043300A (en) 1990-04-16 1990-04-16 Single anneal step process for forming titanium silicide on semiconductor wafer

Publications (1)

Publication Number Publication Date
ES2090165T3 true ES2090165T3 (es) 1996-10-16

Family

ID=27414429

Family Applications (1)

Application Number Title Priority Date Filing Date
ES91106070T Expired - Lifetime ES2090165T3 (es) 1990-04-16 1991-04-16 Proceso para la formacion de una capa de siliciuro de titanio sobre una oblea semiconductora.

Country Status (3)

Country Link
EP (3) EP0452889A3 (es)
DE (1) DE69121451T2 (es)
ES (1) ES2090165T3 (es)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920006533A (ko) * 1990-09-28 1992-04-27 제임스 조셉 드롱 증착된 박막의 장벽성을 개선하기 위한 플라즈마 어닐링 방법
US5849634A (en) * 1994-04-15 1998-12-15 Sharp Kk Method of forming silicide film on silicon with oxygen concentration below 1018 /cm3
KR100449273B1 (ko) * 1997-08-26 2004-11-26 삼성전자주식회사 반도체 제조 장치 및 방법
EP1099776A1 (en) * 1999-11-09 2001-05-16 Applied Materials, Inc. Plasma cleaning step in a salicide process
CN101452831B (zh) * 2007-11-30 2010-06-02 中芯国际集成电路制造(上海)有限公司 生产晶圆的第一片效应的控制方法
US11869806B2 (en) 2021-05-07 2024-01-09 Applied Materials, Inc. Methods of forming molybdenum contacts
US11908914B2 (en) 2021-07-15 2024-02-20 Applied Materials, Inc. Methods of forming semiconductor structures

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1185964B (it) * 1985-10-01 1987-11-18 Sgs Microelettronica Spa Procedimento e relativa apparecchiatura per realizzare contatti metallo-semiconduttore di tipo ohmico
EP0272141B1 (en) * 1986-12-19 1994-03-02 Applied Materials, Inc. Multiple chamber integrated process system

Also Published As

Publication number Publication date
EP0452891A2 (en) 1991-10-23
EP0452891A3 (en) 1992-01-22
DE69121451T2 (de) 1997-02-20
EP0452889A3 (en) 1992-01-22
EP0452889A2 (en) 1991-10-23
EP0452888B1 (en) 1996-08-21
EP0452888A2 (en) 1991-10-23
EP0452888A3 (en) 1992-01-22
DE69121451D1 (de) 1996-09-26

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