ES2091795T3 - Aparato para transmitir datos digitales en formato analogico. - Google Patents
Aparato para transmitir datos digitales en formato analogico.Info
- Publication number
- ES2091795T3 ES2091795T3 ES90305940T ES90305940T ES2091795T3 ES 2091795 T3 ES2091795 T3 ES 2091795T3 ES 90305940 T ES90305940 T ES 90305940T ES 90305940 T ES90305940 T ES 90305940T ES 2091795 T3 ES2091795 T3 ES 2091795T3
- Authority
- ES
- Spain
- Prior art keywords
- analog
- digital
- receiver
- transmitter
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0602—Systems characterised by the synchronising information used
- H04J3/0614—Systems characterised by the synchronising information used the synchronising signal being characterised by the amplitude, duration or polarity
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/02—Channels characterised by the type of signal
- H04L5/04—Channels characterised by the type of signal the signals being represented by different amplitudes or polarities, e.g. quadriplex
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Analogue/Digital Conversion (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
- Communication Control (AREA)
- Time-Division Multiplex Systems (AREA)
- Dc Digital Transmission (AREA)
Abstract
LA COMUNICACION DE INFORMACION DIGITAL A ALTA VELOCIDAD SE CONSIGUE UTILIZANDO UN FORMATO DE TRANSMISION ANALOGICA. UN TRANSMISOR QUE RECIBE DATOS DIGITALES EN PALABRAS MULTIBIT EN PARALELO CONVIERTE PALABRAS DIGITALES EN CICLOS DE RELOJ DE CONVERSION EN UNA SEÑAL ANALOGICA UNICA RELATIVA A UN NIVEL DE CC. EL TRANSMISOR INCLUYE TAMBIEN UN GENERADOR DE IMPULSOS DE REFERENCIA QUE COMBINA UN IMPULSO DE REFERENCIA CON LOS NIVELES ANALOGICOS GENERADOS POR EL CONVERSOR, PARA FORMAR UNA SALIDA ANALOGICA PARA SU TRANSMISION AL RECEPTOR. EL RECEPTOR INCLUYE UN DETECTOR QUE RECIBE LA SALIDA ANALOGICA. EN RESPUESTA AL IMPULSO DE REFERENCIA, EL RECEPTOR GENERA UNA SEÑAL DE RELOJ DE RECUPERACION. UN CONVERSOR INSTANTANEO DE ANALOGICO A DIGITAL CONVIERTE LOS NIVELES ANALOGICOS DE LA SALIDA ANALOGICA EN SALIDAS DIGITALES MULTIBIT. LAS PALABRAS MULTIBIT EN PARALELO SE REGENERAN EN CICLOS DE RELOJ DE RECUPERACION A PARTIR DEL MUESTREADO DE LA SALIDA DIGITAL MULTIBIT UNA VEZ POR CICLO. DE ESTA FORMA, UTILIZANDO UNOS SISTEMAS DE DIGITAL A ANALOGICO A DIGITAL, SE CONSIGUEN VELOCIDADES DE TRANSMISION DE BITS EFECTIVAS, QUE SON SUPERIORES A LAS VELOCIDAD ES DE CONMUTACION DEL TRANSMISOR Y DEL RECEPTOR
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/376,882 US5115450A (en) | 1989-07-06 | 1989-07-06 | High speed digital to analog to digital communication system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2091795T3 true ES2091795T3 (es) | 1996-11-16 |
Family
ID=23486883
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES90305940T Expired - Lifetime ES2091795T3 (es) | 1989-07-06 | 1990-05-31 | Aparato para transmitir datos digitales en formato analogico. |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5115450A (es) |
| EP (1) | EP0407031B1 (es) |
| JP (1) | JPH03132122A (es) |
| AT (1) | ATE143756T1 (es) |
| DE (1) | DE69028738T2 (es) |
| ES (1) | ES2091795T3 (es) |
Families Citing this family (54)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5420860A (en) * | 1990-06-18 | 1995-05-30 | Intelect, Inc. | Volume control for digital communication system |
| US5490282A (en) * | 1992-12-08 | 1996-02-06 | International Business Machines Corporation | Interface having serializer including oscillator operating at first frequency and deserializer including oscillator operating at second frequency equals half first frequency for minimizing frequency interference |
| US5528625A (en) * | 1994-01-03 | 1996-06-18 | At&T Corp. | High speed quantization-level-sampling modem with equalization arrangement |
| GB2306066B (en) * | 1995-10-02 | 2000-02-16 | Northern Telecom Ltd | Method of processing multi-level signals for simple clock recovery |
| US5825825A (en) * | 1996-09-17 | 1998-10-20 | Northern Telecom Limited | Method of processing multi-level signals for simple clock recovery |
| US5953386A (en) * | 1996-06-20 | 1999-09-14 | Lsi Logic Corporation | High speed clock recovery circuit using complimentary dividers |
| US6317469B1 (en) | 1996-06-28 | 2001-11-13 | Lsi Logic Corporation | Method and apparatus for utilizing a data processing system for multi-level data communications providing self-clocking |
| US5913075A (en) * | 1997-03-25 | 1999-06-15 | International Business Machines Corporation | High speed communication between high cycle rate electronic devices using a low cycle rate bus |
| KR100293523B1 (ko) | 1998-02-25 | 2001-09-17 | 구본준, 론 위라하디락사 | 액정표시장치 |
| US6397276B1 (en) | 1999-03-29 | 2002-05-28 | Eugene Rzyski | Data transmission by an alternating-frequency analog signal |
| US7269212B1 (en) | 2000-09-05 | 2007-09-11 | Rambus Inc. | Low-latency equalization in multi-level, multi-line communication systems |
| US7124221B1 (en) | 1999-10-19 | 2006-10-17 | Rambus Inc. | Low latency multi-level communication interface |
| US6396329B1 (en) | 1999-10-19 | 2002-05-28 | Rambus, Inc | Method and apparatus for receiving high speed signals with low latency |
| US7161513B2 (en) * | 1999-10-19 | 2007-01-09 | Rambus Inc. | Apparatus and method for improving resolution of a current mode driver |
| US7564866B2 (en) * | 2000-07-21 | 2009-07-21 | Broadcom Corporation | Methods and systems for digitally processing optical data signals |
| GB0018490D0 (en) | 2000-07-27 | 2000-09-13 | Element 14 Inc | Digital/analogue communication system |
| DE10066029B4 (de) * | 2000-08-23 | 2005-11-10 | Infineon Technologies Ag | Analog/Digital-Wandler |
| DE10041380A1 (de) * | 2000-08-23 | 2002-03-14 | Infineon Technologies Ag | Verfahren und Vorrichtung zum Datenaustausch zwischen Speicher- und Logikbausteinen |
| GB0023800D0 (en) | 2000-09-28 | 2000-11-08 | Sweet James A | Data writing and reading |
| US7173551B2 (en) * | 2000-12-21 | 2007-02-06 | Quellan, Inc. | Increasing data throughput in optical fiber transmission systems |
| US7082484B2 (en) * | 2001-01-16 | 2006-07-25 | International Business Machines Corporation | Architecture for advanced serial link between two cards |
| US7149256B2 (en) * | 2001-03-29 | 2006-12-12 | Quellan, Inc. | Multilevel pulse position modulation for efficient fiber optic communication |
| US7307569B2 (en) * | 2001-03-29 | 2007-12-11 | Quellan, Inc. | Increasing data throughput in optical fiber transmission systems |
| IL158211A0 (en) * | 2001-04-04 | 2004-05-12 | Quellan Inc | Method and system for decoding multilevel signals |
| US20030030873A1 (en) * | 2001-05-09 | 2003-02-13 | Quellan, Inc. | High-speed adjustable multilevel light modulation |
| US7376767B1 (en) | 2002-01-04 | 2008-05-20 | Xilinx, Inc. | Distributed buffering system having programmable interconnecting logic and applications thereof |
| WO2003071731A1 (en) * | 2002-02-15 | 2003-08-28 | Quellan, Inc. | Multi-level signal clock recovery technique |
| US6816101B2 (en) | 2002-03-08 | 2004-11-09 | Quelian, Inc. | High-speed analog-to-digital converter using a unique gray code |
| AU2003223687A1 (en) * | 2002-04-23 | 2003-11-10 | Quellan, Inc. | Combined ask/dpsk modulation system |
| JP2004013681A (ja) * | 2002-06-10 | 2004-01-15 | Bosu & K Consulting Kk | 名刺情報管理システム |
| US7362800B1 (en) | 2002-07-12 | 2008-04-22 | Rambus Inc. | Auto-configured equalizer |
| US7292629B2 (en) * | 2002-07-12 | 2007-11-06 | Rambus Inc. | Selectable-tap equalizer |
| US8861667B1 (en) | 2002-07-12 | 2014-10-14 | Rambus Inc. | Clock data recovery circuit with equalizer clock calibration |
| US7035361B2 (en) * | 2002-07-15 | 2006-04-25 | Quellan, Inc. | Adaptive noise filtering and equalization for optimal high speed multilevel signal decoding |
| US7069454B1 (en) * | 2002-07-24 | 2006-06-27 | Apple Computer, Inc. | System and method for deactivating a first device from a second device |
| AU2003287628A1 (en) * | 2002-11-12 | 2004-06-03 | Quellan, Inc. | High-speed analog-to-digital conversion with improved robustness to timing uncertainty |
| US7804760B2 (en) * | 2003-08-07 | 2010-09-28 | Quellan, Inc. | Method and system for signal emulation |
| JP2007502054A (ja) * | 2003-08-07 | 2007-02-01 | ケラン インコーポレイテッド | クロストークキャンセルのための方法とシステム |
| US7308058B2 (en) * | 2003-10-27 | 2007-12-11 | Rambus Inc. | Transparent multi-mode PAM interface |
| ATE488068T1 (de) * | 2003-11-17 | 2010-11-15 | Quellan Inc | Verfahren und system zur löschung von antennenstörungen |
| US7616700B2 (en) * | 2003-12-22 | 2009-11-10 | Quellan, Inc. | Method and system for slicing a communication signal |
| US7725079B2 (en) * | 2004-12-14 | 2010-05-25 | Quellan, Inc. | Method and system for automatic control in an interference cancellation device |
| US7522883B2 (en) * | 2004-12-14 | 2009-04-21 | Quellan, Inc. | Method and system for reducing signal interference |
| US7842355B2 (en) * | 2005-11-01 | 2010-11-30 | Applied Materials, Inc. | System and method for modulation of power and power related functions of PECVD discharge sources to achieve new film properties |
| WO2007127369A2 (en) * | 2006-04-26 | 2007-11-08 | Quellan, Inc. | Method and system for reducing radiated emissions from a communications channel |
| US8875273B2 (en) | 2010-12-17 | 2014-10-28 | Isolated Technologies, Inc. | Code domain isolation |
| US10484421B2 (en) | 2010-12-17 | 2019-11-19 | Isolated Technologies, Llc | Code domain isolation |
| US8873603B2 (en) * | 2011-08-01 | 2014-10-28 | Electronics And Telecommunications Research Institute | Method and apparatus for amplitude modulation of spread signal |
| FR3024930B1 (fr) * | 2014-08-12 | 2019-08-09 | Stmicroelectronics Sa | Liaison serie a haut debit |
| US10490245B2 (en) * | 2017-10-02 | 2019-11-26 | Micron Technology, Inc. | Memory system that supports dual-mode modulation |
| US11403241B2 (en) | 2017-10-02 | 2022-08-02 | Micron Technology, Inc. | Communicating data with stacked memory dies |
| US10725913B2 (en) | 2017-10-02 | 2020-07-28 | Micron Technology, Inc. | Variable modulation scheme for memory device access or operation |
| US10446198B2 (en) | 2017-10-02 | 2019-10-15 | Micron Technology, Inc. | Multiple concurrent modulation schemes in a memory system |
| US10355893B2 (en) | 2017-10-02 | 2019-07-16 | Micron Technology, Inc. | Multiplexing distinct signals on a single pin of a memory device |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3337691A (en) * | 1964-10-05 | 1967-08-22 | Itt | Multiplex digital communication system |
| US3559067A (en) * | 1967-12-14 | 1971-01-26 | Octronix Inc | Multilevel weighted carrier encoded digital data transmission system |
| US3569615A (en) * | 1968-08-07 | 1971-03-09 | Atomic Energy Commission | Method and apparatus for transmitting video information with amplitude representation of position information |
| US3832494A (en) * | 1970-06-10 | 1974-08-27 | Control Data Corp | Signal multiplexer and demultiplexer |
| US3815109A (en) * | 1972-07-05 | 1974-06-04 | Nasa | Miniature multichannel biotelemeter system |
| US3870828A (en) * | 1973-09-06 | 1975-03-11 | Paradyne Corp | Superimposed binary signal |
| US3979561A (en) * | 1975-05-06 | 1976-09-07 | The United States Of America As Represented By The Secretary Of The Navy | Level-code encoded multiplexer |
| DE2714153C2 (de) * | 1977-03-30 | 1979-05-03 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren und Anordnung zur Regeneration des Taktes eines Mehrstufen- |
| US4404532A (en) * | 1978-09-29 | 1983-09-13 | Communications Satellite Corporation | Modulator having improved bandwidth and power requirements |
| DE3044620A1 (de) * | 1980-11-27 | 1982-07-08 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Digitales nachrichtenuebertragungssystem |
| US4347619A (en) * | 1980-12-19 | 1982-08-31 | Discovision Associates | Digital formatting system |
| US4473901A (en) * | 1982-02-04 | 1984-09-25 | Raytheon Company | Self clocking sampled analog data transmission system |
| US4511862A (en) * | 1982-10-20 | 1985-04-16 | Harris Corporation | Programmable multitone DPSK modulator |
| GB2189366B (en) * | 1986-04-17 | 1989-12-28 | British Broadcasting Corp | Method and apparatus for conveying information signals |
| US4812786A (en) * | 1987-09-28 | 1989-03-14 | California Institute Of Technology | Method and system for providing precise multi-function modulation |
| JPH061908B2 (ja) * | 1988-02-02 | 1994-01-05 | 郵政省通信総合研究所長 | 伝送路歪補償方式 |
-
1989
- 1989-07-06 US US07/376,882 patent/US5115450A/en not_active Expired - Lifetime
-
1990
- 1990-05-31 DE DE69028738T patent/DE69028738T2/de not_active Expired - Fee Related
- 1990-05-31 EP EP90305940A patent/EP0407031B1/en not_active Expired - Lifetime
- 1990-05-31 ES ES90305940T patent/ES2091795T3/es not_active Expired - Lifetime
- 1990-05-31 AT AT90305940T patent/ATE143756T1/de not_active IP Right Cessation
- 1990-06-26 JP JP2168146A patent/JPH03132122A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03132122A (ja) | 1991-06-05 |
| EP0407031A2 (en) | 1991-01-09 |
| EP0407031B1 (en) | 1996-10-02 |
| DE69028738T2 (de) | 1997-04-10 |
| ATE143756T1 (de) | 1996-10-15 |
| US5115450A (en) | 1992-05-19 |
| DE69028738D1 (de) | 1996-11-07 |
| EP0407031A3 (en) | 1991-11-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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