ES2102201T3 - Registro de desplazamiento reacoplado para la generacion de señales digitales que representan series de numeros aleatorios. - Google Patents
Registro de desplazamiento reacoplado para la generacion de señales digitales que representan series de numeros aleatorios.Info
- Publication number
- ES2102201T3 ES2102201T3 ES94904989T ES94904989T ES2102201T3 ES 2102201 T3 ES2102201 T3 ES 2102201T3 ES 94904989 T ES94904989 T ES 94904989T ES 94904989 T ES94904989 T ES 94904989T ES 2102201 T3 ES2102201 T3 ES 2102201T3
- Authority
- ES
- Spain
- Prior art keywords
- digital signals
- generation
- random numbers
- interval
- displacement record
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
- G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
- G06F2207/581—Generating an LFSR sequence, e.g. an m-sequence; sequence may be generated without LFSR, e.g. using Galois Field arithmetic
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
- G06F2207/583—Serial finite field implementation, i.e. serial implementation of finite field arithmetic, generating one new bit or trit per step, e.g. using an LFSR or several independent LFSRs; also includes PRNGs with parallel operation between LFSR and outputs
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
- Complex Calculations (AREA)
- Recording Measured Values (AREA)
Abstract
LA INVENCION SE REFIERE A UN REGISTRADOR DE DESPLAZAMIENTO DE REALIMENTACION PARA LA GENERACION DE SEÑALES DIGITALES REPRESENTANDO SERIES DE NUMEROS SEUDOALEATORIOS, QUE CONTIENE N ETAPAS Y CIRCUITOS EXCLUSIVOS O CONEXIONES EN LA LOGICA DE REALIMENTACION, ASI COMO UN GENERADOR DE INTERVALOS. PARA GENERAR SEÑALES DIGITALES CON UN REGISTRADOR DE DESPLAZAMIENTO DE REALIMENTACION ADECUADO PARA PROCESADO DIGITAL SUBSECUENTE, EL GENERADOR (17) DE INTERVALOS ESTA CONECTADO EN LAS N ETAPAS (11, 12, 13, 14, 15) DE UN REGISTRADOR (10) DE DESPLAZAMIENTO POR MEDIO DE UN CIRCUITO (18) PUERTA CONTROLABLE, QUE BLOQUEA UN IMPULSO DE INTERVALO POR CADA SEGUNDO IMPULSO DE INTERVALO (CLK) DEL GENERADOR (17) DE INTERVALO.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE4302830A DE4302830C1 (de) | 1993-01-27 | 1993-01-27 | Rückgekoppeltes Schieberegister zum Erzeugen von Pseudozufallszahlenfolgen darstellenden digitalen Signalen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2102201T3 true ES2102201T3 (es) | 1997-07-16 |
Family
ID=6479406
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES94904989T Expired - Lifetime ES2102201T3 (es) | 1993-01-27 | 1994-01-26 | Registro de desplazamiento reacoplado para la generacion de señales digitales que representan series de numeros aleatorios. |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5596617A (es) |
| EP (1) | EP0681760B1 (es) |
| DE (2) | DE4302830C1 (es) |
| ES (1) | ES2102201T3 (es) |
| WO (1) | WO1994017591A1 (es) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3512939B2 (ja) * | 1996-03-12 | 2004-03-31 | 株式会社ルネサステクノロジ | 疑似乱数発生回路及び双方向シフトレジスタ |
| US6240432B1 (en) | 1998-12-28 | 2001-05-29 | Vanguard International Semiconductor Corporation | Enhanced random number generator |
| US7124155B2 (en) * | 2002-07-25 | 2006-10-17 | Koninklijke Philips Electronics N.V. | Latching electronic circuit for random number generation |
| US6771104B2 (en) | 2002-07-25 | 2004-08-03 | Koninklijke Philips Electronics N.V. | Switching electronic circuit for random number generation |
| US7047262B2 (en) * | 2002-08-21 | 2006-05-16 | Koninklijke Philips Electronics N.V. | Entropy estimation and decimation for improving the randomness of true random number generation |
| US20040049525A1 (en) * | 2002-09-06 | 2004-03-11 | Koninklijke Philips Electronics N.V. | Feedback random number generation method and system |
| CN102034553B (zh) * | 2009-09-25 | 2013-07-24 | 北京京东方光电科技有限公司 | 移位寄存器及其栅线驱动装置 |
| US11177793B2 (en) | 2017-08-09 | 2021-11-16 | Planar Systems, Inc. | Clock synthesis circuitry and associated techniques for generating clock signals refreshing display screen content |
| JP2021128555A (ja) * | 2020-02-13 | 2021-09-02 | 京セラドキュメントソリューションズ株式会社 | 乱数発生器 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3715508A (en) * | 1967-09-15 | 1973-02-06 | Ibm | Switching circuits employing orthogonal and quasi-orthogonal pseudo-random code sequences |
| US3751648A (en) * | 1971-12-01 | 1973-08-07 | Communications Satellite Corp | Generalized shift register pulse sequence generator |
| SE380696B (sv) * | 1974-03-20 | 1975-11-10 | Philips Svenska Ab | Sett att alstra en pseudoslumpbitfoljd och anordning for utforande av settet. |
| DE2734302C3 (de) * | 1977-07-29 | 1981-09-03 | Siemens AG, 1000 Berlin und 8000 München | Taktgesteuertes rückgekoppeltes Schieberegister zur Erzeugung einer Quasizufalls-Bitfolge maximaler Länge |
| JPH0528789A (ja) * | 1991-07-25 | 1993-02-05 | Sharp Corp | 論理回路 |
-
1993
- 1993-01-27 DE DE4302830A patent/DE4302830C1/de not_active Expired - Fee Related
-
1994
- 1994-01-26 US US08/495,493 patent/US5596617A/en not_active Expired - Fee Related
- 1994-01-26 WO PCT/DE1994/000091 patent/WO1994017591A1/de not_active Ceased
- 1994-01-26 DE DE59402234T patent/DE59402234D1/de not_active Expired - Fee Related
- 1994-01-26 EP EP94904989A patent/EP0681760B1/de not_active Expired - Lifetime
- 1994-01-26 ES ES94904989T patent/ES2102201T3/es not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0681760B1 (de) | 1997-03-26 |
| WO1994017591A1 (de) | 1994-08-04 |
| US5596617A (en) | 1997-01-21 |
| DE4302830C1 (de) | 1994-03-03 |
| DE59402234D1 (de) | 1997-04-30 |
| EP0681760A1 (de) | 1995-11-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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