ES2109763T3 - Disposicion de circuito para la eliminacion de parasitos de una señal marco de impulsos. - Google Patents

Disposicion de circuito para la eliminacion de parasitos de una señal marco de impulsos.

Info

Publication number
ES2109763T3
ES2109763T3 ES95113632T ES95113632T ES2109763T3 ES 2109763 T3 ES2109763 T3 ES 2109763T3 ES 95113632 T ES95113632 T ES 95113632T ES 95113632 T ES95113632 T ES 95113632T ES 2109763 T3 ES2109763 T3 ES 2109763T3
Authority
ES
Spain
Prior art keywords
signal
frame signal
providing
counter
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95113632T
Other languages
English (en)
Inventor
Gerhard Ing Grad Prey
Stefan Dipl-Ing Leitol
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Application granted granted Critical
Publication of ES2109763T3 publication Critical patent/ES2109763T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H04J3/0608—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference

Landscapes

  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Noise Elimination (AREA)
  • Picture Signal Circuits (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Details Of Television Scanning (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Catching Or Destruction (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

LA SEÑAL DE MARCOS DE IMPULSO, QUE APARECE SEGUN UNA CANTIDAD PREVIAMENTE DADA DE IMPULSOS (CLK) DE INTERVALO, SE CEDE A PARTIR DE UN CONTADOR (CT), QUE SE CONECTA POSTERIORMENTE POR MEDIO DEL FLANCO DE CAIDA DE INTERVALO Y SUMINISTRA EN EL EXTREMO DE MARCO DE IMPULSOS UNA SEÑAL ADICIONADA A TRAVES DE UN MIEMBRO (VZ) DE RETARDO COMO SEÑAL DE RECUPERACION. SE HA PREVISTO ADEMAS UNA ETAPA (BK) DE BASCULACION BIESTABLE, QUE SE CONECTA CON EL FLANCO DE SUBIDA DEL INTERVALO. COMO SEÑAL DE ENTRADA SE ADICIONA LA SEÑAL DE SALIDA DEL CONTADOR. SU SEÑAL DE SALIDA ES LA SEÑAL DE MARCO DE IMPULSO LIBRE DE PERTURBACIONES (FSO).
ES95113632T 1994-09-23 1995-08-30 Disposicion de circuito para la eliminacion de parasitos de una señal marco de impulsos. Expired - Lifetime ES2109763T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4434085A DE4434085A1 (de) 1994-09-23 1994-09-23 Schaltungsanordnung zur Störbefreiung eines Pulsrahmensignals

Publications (1)

Publication Number Publication Date
ES2109763T3 true ES2109763T3 (es) 1998-01-16

Family

ID=6529053

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95113632T Expired - Lifetime ES2109763T3 (es) 1994-09-23 1995-08-30 Disposicion de circuito para la eliminacion de parasitos de una señal marco de impulsos.

Country Status (6)

Country Link
EP (1) EP0704786B1 (es)
AT (1) ATE160230T1 (es)
DE (2) DE4434085A1 (es)
DK (1) DK0704786T3 (es)
ES (1) ES2109763T3 (es)
GR (1) GR3025435T3 (es)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1320467C (zh) * 2003-09-04 2007-06-06 纬创资通股份有限公司 抗噪声时钟信号电路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2938228C2 (de) * 1979-09-21 1982-02-25 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren und Schaltung zur Synchronisation
EP0309849A1 (de) * 1987-09-28 1989-04-05 Siemens Aktiengesellschaft Anordnung zur Entzerrung der Impulsbreiten eines Digitalsignals
US5259006A (en) * 1990-04-18 1993-11-02 Quickturn Systems, Incorporated Method for substantially eliminating hold time violations in implementing high speed logic circuits or the like
US5347227A (en) * 1992-12-10 1994-09-13 At&T Bell Laboratories Clock phase adjustment between duplicated clock circuits

Also Published As

Publication number Publication date
DE59500978D1 (de) 1997-12-18
GR3025435T3 (en) 1998-02-27
ATE160230T1 (de) 1997-11-15
EP0704786B1 (de) 1997-11-12
EP0704786A1 (de) 1996-04-03
DE4434085A1 (de) 1996-03-28
DK0704786T3 (da) 1998-07-27

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