ES2111056T3 - Sistema y metodo de telecomunicaciones con medios de deteccion de errores. - Google Patents

Sistema y metodo de telecomunicaciones con medios de deteccion de errores.

Info

Publication number
ES2111056T3
ES2111056T3 ES92311219T ES92311219T ES2111056T3 ES 2111056 T3 ES2111056 T3 ES 2111056T3 ES 92311219 T ES92311219 T ES 92311219T ES 92311219 T ES92311219 T ES 92311219T ES 2111056 T3 ES2111056 T3 ES 2111056T3
Authority
ES
Spain
Prior art keywords
telecommunication system
detection means
error detection
data flow
imitation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES92311219T
Other languages
English (en)
Inventor
Ian John Skinner
Geoffrey Chopping
Andrew Keith Borland
Ernest Culley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GPT Ltd
Plessey Telecommunications Ltd
Original Assignee
GPT Ltd
Plessey Telecommunications Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GPT Ltd, Plessey Telecommunications Ltd filed Critical GPT Ltd
Application granted granted Critical
Publication of ES2111056T3 publication Critical patent/ES2111056T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H04J3/0608—Detectors therefor, e.g. correlators, state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)

Abstract

LA SINCRONIZACION DE UN TERMINAL RECEPTOR DE UN SISTEMA DE TELECOMUNICACIONES CON UN FLUJO DE DATOS DE ENTRADA SE LLEVA A CABO A PARTIR DE UNA SEÑAL DE SINCRONIZACION PORTADA POR EL FLUJO DE DATOS. ES POSIBLE QUE OCURRA UNA "IMITACION" DE LA SEÑAL DE SINCRONIZACION DENTRO DEL FLUJO DE DATOS. CON UN SISTEMA Y UN METODO COMO LOS DESCRITOS PARA DETECTAR LAS SEÑALES REALES Y LAS DE IMITACION Y VALIDAR LAS SEÑALES SE PUEDE CONSEGUIR UNA ALINEACION CORRECTA.
ES92311219T 1991-12-13 1992-12-09 Sistema y metodo de telecomunicaciones con medios de deteccion de errores. Expired - Lifetime ES2111056T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB919126505A GB9126505D0 (en) 1991-12-13 1991-12-13 Telecommunications system and method

Publications (1)

Publication Number Publication Date
ES2111056T3 true ES2111056T3 (es) 1998-03-01

Family

ID=10706217

Family Applications (1)

Application Number Title Priority Date Filing Date
ES92311219T Expired - Lifetime ES2111056T3 (es) 1991-12-13 1992-12-09 Sistema y metodo de telecomunicaciones con medios de deteccion de errores.

Country Status (6)

Country Link
US (1) US5377209A (es)
EP (1) EP0550169B1 (es)
JP (1) JPH05276220A (es)
DE (1) DE69224052T2 (es)
ES (1) ES2111056T3 (es)
GB (2) GB9126505D0 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4446511A1 (de) * 1994-12-24 1996-06-27 Sel Alcatel Ag Synchrones digitales Nachrichtenübertragungssystem mit hierarchischem Synchronisierungsnetz
EP0766420B1 (de) * 1995-09-29 2002-06-05 Infineon Technologies AG Verfahren zur Synchronisation auf eine Folge von digitalen Datenwerten und Schaltungsanordnung zur Durchführung des Verfahrens
GB2309857B (en) * 1996-01-31 2000-08-30 Nokia Mobile Phones Ltd Radio telephones and method of operation
US6128761A (en) * 1996-12-13 2000-10-03 Cisco Technology, Inc. Method and apparatus for G.706 frame alignment and CRC procedure test tool
US6839392B1 (en) * 1999-09-27 2005-01-04 Agere Systems Inc. Methods and apparatus for adaptive mimic rejection
CN112713963A (zh) * 2020-12-16 2021-04-27 北京华环电子股份有限公司 信号无损保护方法、装置、信号接收器及可读存储介质

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL176420C (nl) * 1977-09-29 1985-04-01 Nederlanden Staat Synchronisatieinrichting voor het afgeven van een met een in een inkomend digitaal signaal aanwezig synchronisatieteken overeenkomend synchronisatiesignaal.
US4142070A (en) * 1977-12-27 1979-02-27 Wescom, Inc. False framing detector
US4316284A (en) * 1980-09-11 1982-02-16 Bell Telephone Laboratories, Incorporated Frame resynchronization circuit for digital receiver
US4316285A (en) * 1980-09-11 1982-02-16 Bell Telephone Laboratories, Incorporated Framing circuit for digital receiver
DE3212450A1 (de) * 1982-04-02 1983-10-13 Siemens AG, 1000 Berlin und 8000 München Synchronisiereinrichtung einer digitalsignal-demultiplexeinrichung
JPS59221047A (ja) * 1983-05-30 1984-12-12 Victor Co Of Japan Ltd デイジタル信号伝送における同期信号検出回路
JP2636210B2 (ja) * 1984-06-22 1997-07-30 日本電気株式会社 同期式データ受信回路
EP0212327B1 (en) * 1985-07-26 1991-10-02 Fujitsu Limited Digital signal transmission system having frame synchronization operation
US4768192A (en) * 1987-04-01 1988-08-30 General Signal Corp. Frame synchronization detection system for time division multiplexed (TDM) digital signals
FR2631762B1 (fr) * 1988-05-18 1991-02-15 Cit Alcatel Dispositif de synchronisation de trame pour un train numerique synchrone partage en blocs au moyen d'un code par blocs et structure en trames
DE69023485D1 (de) * 1990-05-15 1995-12-14 Ibm Verfahren und Einrichtung für die Erkennung in einem seriellen Bitstrom verteilter Rahmenmuster.

Also Published As

Publication number Publication date
US5377209A (en) 1994-12-27
GB9225713D0 (en) 1993-02-03
JPH05276220A (ja) 1993-10-22
DE69224052T2 (de) 1998-04-23
GB9126505D0 (en) 1992-02-12
GB2262417B (en) 1995-06-28
EP0550169A1 (en) 1993-07-07
DE69224052D1 (de) 1998-02-19
GB2262417A (en) 1993-06-16
EP0550169B1 (en) 1998-01-14

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