ES2113301A1 - Dispositivo de interpolacion de señales. - Google Patents

Dispositivo de interpolacion de señales.

Info

Publication number
ES2113301A1
ES2113301A1 ES09502096A ES9502096A ES2113301A1 ES 2113301 A1 ES2113301 A1 ES 2113301A1 ES 09502096 A ES09502096 A ES 09502096A ES 9502096 A ES9502096 A ES 9502096A ES 2113301 A1 ES2113301 A1 ES 2113301A1
Authority
ES
Spain
Prior art keywords
outputs
data storage
storage means
samples
values
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES09502096A
Other languages
English (en)
Other versions
ES2113301B1 (es
Inventor
Martinez Maria Afric Rodriguez
Mari Juan Jose Mari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales Alenia Space Espana SA
Original Assignee
Alcatel Espacio SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espacio SA filed Critical Alcatel Espacio SA
Priority to ES9502096A priority Critical patent/ES2113301B1/es
Priority to AU68135/96A priority patent/AU6813596A/en
Priority to EP96440090A priority patent/EP0771093A2/en
Priority to CA 2188693 priority patent/CA2188693A1/en
Priority to CN 96122660 priority patent/CN1166097A/zh
Priority to JP28508296A priority patent/JPH09231200A/ja
Publication of ES2113301A1 publication Critical patent/ES2113301A1/es
Application granted granted Critical
Publication of ES2113301B1 publication Critical patent/ES2113301B1/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • H03H17/06—Non-recursive filters
    • H03H17/0607—Non-recursive filters comprising a ROM addressed by the input data signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • H03H17/06—Non-recursive filters
    • H03H17/0621—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
    • H03H17/0635—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies
    • H03H17/065—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer
    • H03H17/0657—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer where the output-delivery frequency is higher than the input sampling frequency, i.e. interpolation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0029—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Complex Calculations (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

DISPOSITIVO DE INTERPOLACION DE SEÑALES. DISPOSITIVO DE INTERPOLACION PARA LA OBTENCION DE VALORES INTERMEDIOS ENTRE DOS MUESTRAS CONSECUTIVAS DE UNA SEÑAL, ESPECIALMENTE APLICABLE EN DEMODULADORES Y SISTEMAS DE ADQUISICION DE DATOS A ALTA VELOCIDAD. COMPRENDE UNOS MEDIOS DE RETARDO (T) QUE RETARDAN N VECES LA SEÑAL DE ENTRADA (X0), OBTENIENDO N+1 MUESTRAS TOTALES (X0, X1, X2, X3); Y UNOS MEDIOS DE ALMACENAMIENTO DE DATOS (F0, F1, F2, F3) QUE RECIBEN CADA UNO UNA DE LAS N+1 MUESTRAS TOTALES (X0, X1, X2, X3) Y EL VALOR DE LA FRACCION DEL INTERVALO DE TIEMPO (MI) Y GENERAN N+1 SALIDAS (X0", X1", X2", X3''); UNOS MEDIOS DE SUMADO (SUM) QUE SUMAN LAS N+1 SALIDAS (X0", X1", X2", X3'') DE LOS DISPOSITIVOS DE ALMACENAMIENTO DE DATOS (F0, F1, F2, F3), Y GENERAN UN VALOR INTERPOLADO FINAL (X). CADA DISPOSITIVO DE ALMACENAMIENTO DE DATOS (F0, F1, F2, F3) CONTIENE UNA TABLA DE VALORES, DE FORMA QUE LOS VALORES DE SALIDA DE CADA UNO DE ELLOS (X0", X1", X2", X3'') SON FUNCION DE LOS VALORES DE ENTRADA QUETOME EN CADA CASO LA FRACCION DEL INTERVALO DE TIEMPO (MI) Y DEL VALOR DE SU CORRESPONDIENTE MUESTRA (X0, X1, X2, X3).
ES9502096A 1995-10-27 1995-10-27 Dispositivo de interpolacion de señales. Expired - Lifetime ES2113301B1 (es)

Priority Applications (6)

Application Number Priority Date Filing Date Title
ES9502096A ES2113301B1 (es) 1995-10-27 1995-10-27 Dispositivo de interpolacion de señales.
AU68135/96A AU6813596A (en) 1995-10-27 1996-10-11 A signal interpolator
EP96440090A EP0771093A2 (en) 1995-10-27 1996-10-21 Signal interpolator for timing recovery
CA 2188693 CA2188693A1 (en) 1995-10-27 1996-10-23 Signal interpolator
CN 96122660 CN1166097A (zh) 1995-10-27 1996-10-25 信号插值器
JP28508296A JPH09231200A (ja) 1995-10-27 1996-10-28 信号補間装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ES9502096A ES2113301B1 (es) 1995-10-27 1995-10-27 Dispositivo de interpolacion de señales.

Publications (2)

Publication Number Publication Date
ES2113301A1 true ES2113301A1 (es) 1998-04-16
ES2113301B1 ES2113301B1 (es) 1999-01-01

Family

ID=8291985

Family Applications (1)

Application Number Title Priority Date Filing Date
ES9502096A Expired - Lifetime ES2113301B1 (es) 1995-10-27 1995-10-27 Dispositivo de interpolacion de señales.

Country Status (6)

Country Link
EP (1) EP0771093A2 (es)
JP (1) JPH09231200A (es)
CN (1) CN1166097A (es)
AU (1) AU6813596A (es)
CA (1) CA2188693A1 (es)
ES (1) ES2113301B1 (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999056427A2 (en) * 1998-04-27 1999-11-04 Koninklijke Philips Electronics N.V. Sample rate converter using polynomial interpolation
JP3589405B2 (ja) 1999-11-04 2004-11-17 パイオニア株式会社 波形等化器および記録情報再生装置
CN109636873B (zh) * 2018-12-12 2023-07-18 上海联影医疗科技股份有限公司 用于医学图像重建的数据处理方法和医学图像重建方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4794341A (en) * 1985-11-05 1988-12-27 Signal Processors Limited Digital filters and demodulators
US5073904A (en) * 1988-05-25 1991-12-17 Hitachi, Ltd. Digital signal processing type demodulation method and demodulation circuit
US5309484A (en) * 1992-09-01 1994-05-03 Motorola, Inc. Method and apparatus for asynchronous timing recovery using interpolation filter
EP0601605A2 (en) * 1992-12-11 1994-06-15 Mitsubishi Denki Kabushiki Kaisha Clock recovery circuit of a demodulator

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4794341A (en) * 1985-11-05 1988-12-27 Signal Processors Limited Digital filters and demodulators
US5073904A (en) * 1988-05-25 1991-12-17 Hitachi, Ltd. Digital signal processing type demodulation method and demodulation circuit
US5309484A (en) * 1992-09-01 1994-05-03 Motorola, Inc. Method and apparatus for asynchronous timing recovery using interpolation filter
EP0601605A2 (en) * 1992-12-11 1994-06-15 Mitsubishi Denki Kabushiki Kaisha Clock recovery circuit of a demodulator

Also Published As

Publication number Publication date
CN1166097A (zh) 1997-11-26
ES2113301B1 (es) 1999-01-01
AU6813596A (en) 1997-05-01
JPH09231200A (ja) 1997-09-05
CA2188693A1 (en) 1997-04-28
EP0771093A2 (en) 1997-05-02

Similar Documents

Publication Publication Date Title
EP0344326B1 (en) Fir digital filter device
KR890004502A (ko) 신호 위상 정렬 회로
JPH05175730A (ja) 時分割式ダイレクト受信機
KR910010931A (ko) 입력 신호를 직접 구적 샘플링 하는 수신기
KR0185594B1 (ko) 샘플링 레이트 변환 장치
US4021616A (en) Interpolating rate multiplier
EP1262019A1 (en) Apparatus for splitting the frequency band of an input signal
EP0675613A3 (en) Jitter reduction system in digital demultiplexers
US4559607A (en) Arrangement to provide an accurate time-of-arrival indication for a plurality of received signals
ES2113301A1 (es) Dispositivo de interpolacion de señales.
CA2225371A1 (en) Circuit for generating field identification signal and method therefor
US5432813A (en) Parallel processing based digital matched filter and error detector for a digital demodulator
KR920702095A (ko) 2진 정보를 부호화하는 디지탈 회로
EP0389874A3 (en) Phase shift circuit and repeater using the same
EP0372648A3 (en) Circuit arrangement for processing analogue electrical signals
EP0103355A2 (en) Analog to digital converting system for a video signal
US4743969A (en) Correlator
SU1721837A1 (ru) Устройство дл приема четвертично-кодированных последовательностей
SU622210A1 (ru) Устройство дл мажоритарного выбора сигналов
JPH06244890A (ja) ディジタル処理型直交検波回路
US5204885A (en) Method and device for evaluating a digital signal using a digital counter with lsb signal separately applied to both counter and register
KR950007531A (ko) 2차원 디지탈 필터
SU1201789A1 (ru) Накопитель импульсных сигналов
SU1125737A1 (ru) Двухканальный формирователь однополосного сигнала
SU1401630A1 (ru) Устройство дл фазовой синхронизации

Legal Events

Date Code Title Description
EC2A Search report published

Date of ref document: 19980416

Kind code of ref document: A1

Effective date: 19980416

FA2A Application withdrawn

Effective date: 19990602