ES2114541T3 - Procedimiento y disposicion para generar una señal multiplex de emision y para sincronizar una señal multiplex de recepcion sobre la señal multiplex de emision. - Google Patents
Procedimiento y disposicion para generar una señal multiplex de emision y para sincronizar una señal multiplex de recepcion sobre la señal multiplex de emision.Info
- Publication number
- ES2114541T3 ES2114541T3 ES92100594T ES92100594T ES2114541T3 ES 2114541 T3 ES2114541 T3 ES 2114541T3 ES 92100594 T ES92100594 T ES 92100594T ES 92100594 T ES92100594 T ES 92100594T ES 2114541 T3 ES2114541 T3 ES 2114541T3
- Authority
- ES
- Spain
- Prior art keywords
- multiplex
- emission signal
- signal
- clock
- synchronize
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000006243 chemical reaction Methods 0.000 abstract 2
- 230000001360 synchronised effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Mobile Radio Communication Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
EN LA JERARQUIA DIGITAL PLEXIOCHRON, SE MUESTRAN SEÑALES DIGITALES DE UN PLANO SOLO DE FRECUENCIA E INTERVALO APROXIMADAMENTE IGUAL Y SON ELABORADAS DE FORMA CONTINUA PLEXIOCHRONA. SIN EMBARGO SE EXIGE TAMBIEN UN SERVICIO SINCRONO DE SEÑAL MULTIPLEX EMISORA Y RECEPTORA. ESTO ES POSIBLE, CUANDO SE GENERAN EN UNA PARTE EMISORA Y RECEPTORA DE UNA ESTRUCTURA DE AYUDA, EN EL QUE LOS BITS VACIOS (LB) SON INTRODUCIDOS ENTRE LOS BYTES DE DATOS (SD). FINALMENTE SON ELIMINADOS POR MEDIO DE UNA TRANSFORMACION SERIE PARALELO (FG. 3), UN ALMACENAMIENTO Y UNA TRANSFORMACION PARALELA SERIE (FG. 4) BAJO LA COOPERACION DE UNA CADENCIA DE AYUDA CONJUNTA. LA ADAPTACION DEL INTERVALO O CADENCIA DE RECEPCION Y DE EMISION RESULTA A TRAVES DEL ADITAMENTO O ELIMINACION DE UNO O MULTIPLES BITS VACIOS ENTRE DOS BYTES DE DATOS (SD) EN LA PARTE RECEPTORA.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE4102722 | 1991-01-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2114541T3 true ES2114541T3 (es) | 1998-06-01 |
Family
ID=6423998
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES92100594T Expired - Lifetime ES2114541T3 (es) | 1991-01-30 | 1992-01-15 | Procedimiento y disposicion para generar una señal multiplex de emision y para sincronizar una señal multiplex de recepcion sobre la señal multiplex de emision. |
Country Status (7)
| Country | Link |
|---|---|
| EP (1) | EP0498177B1 (es) |
| AT (1) | ATE164714T1 (es) |
| DE (1) | DE59209257D1 (es) |
| DK (1) | DK0498177T3 (es) |
| ES (1) | ES2114541T3 (es) |
| GR (1) | GR3026720T3 (es) |
| RU (1) | RU2099873C1 (es) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2412962B2 (de) * | 1974-03-18 | 1976-02-26 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur zeitmultiplex-uebertragung von daten |
| DE2712775C2 (de) * | 1977-03-23 | 1979-03-22 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Schaltungsanordnung zur empfangsseitigen Auswertung von Kennbits und zur Rahmensynchroitisierung eines Zeitmultiplexsystems mit Hilfe fest vorgegebener Syncnronisierworte |
| AR242878A1 (es) * | 1986-11-27 | 1993-05-31 | Siemens Ag | Disposicion de circuito para derivar una senal de reloj auxiliar de datos a partir de la frecuencia y/o de la fase de reloj de una senal digital sincronica o plesiocronica. |
-
1992
- 1992-01-15 EP EP92100594A patent/EP0498177B1/de not_active Expired - Lifetime
- 1992-01-15 DE DE59209257T patent/DE59209257D1/de not_active Expired - Fee Related
- 1992-01-15 AT AT92100594T patent/ATE164714T1/de not_active IP Right Cessation
- 1992-01-15 DK DK92100594T patent/DK0498177T3/da active
- 1992-01-15 ES ES92100594T patent/ES2114541T3/es not_active Expired - Lifetime
- 1992-01-29 RU SU925010714A patent/RU2099873C1/ru active
-
1998
- 1998-04-28 GR GR980400909T patent/GR3026720T3/el unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP0498177A3 (en) | 1995-02-08 |
| EP0498177B1 (de) | 1998-04-01 |
| ATE164714T1 (de) | 1998-04-15 |
| EP0498177A2 (de) | 1992-08-12 |
| GR3026720T3 (en) | 1998-07-31 |
| RU2099873C1 (ru) | 1997-12-20 |
| DE59209257D1 (de) | 1998-05-07 |
| DK0498177T3 (da) | 1998-11-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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