ES2117560B1 - Decodificador y metodo para el mismo. - Google Patents

Decodificador y metodo para el mismo.

Info

Publication number
ES2117560B1
ES2117560B1 ES09600759A ES9600759A ES2117560B1 ES 2117560 B1 ES2117560 B1 ES 2117560B1 ES 09600759 A ES09600759 A ES 09600759A ES 9600759 A ES9600759 A ES 9600759A ES 2117560 B1 ES2117560 B1 ES 2117560B1
Authority
ES
Spain
Prior art keywords
decoder
same
bit
branch metrics
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
ES09600759A
Other languages
English (en)
Other versions
ES2117560A1 (es
Inventor
Joseph M Nowack
Bruce Mueller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of ES2117560A1 publication Critical patent/ES2117560A1/es
Application granted granted Critical
Publication of ES2117560B1 publication Critical patent/ES2117560B1/es
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

DECODIFICADOR Y METODO PARA EL MISMO, DONDE UN DECODIFICADOR (223) INCLUYE UN CIRCUITO DE PROBABILIDAD (432) QUE GENERA METRICAS DE RAMA USANDO PROBABILIDADES DE BIT QUE REPRESENTAN LAS RELACIONES DE CORRELACION TRAMA A TRAMA. LAS METRICAS DE RAMA SE INTRODUCEN EN UN DECODIFICADOR (434) QUE ENTREGA BITS DE DATOS DECODIFICADOS EN FUNCION DE LAS PROBABILIDADES DE BIT PARA, AL MENOS, PREDETERMINADAS POSICIONES DE LOS BITS.
ES09600759A 1995-03-31 1996-03-29 Decodificador y metodo para el mismo. Expired - Fee Related ES2117560B1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US41425895A 1995-03-31 1995-03-31

Publications (2)

Publication Number Publication Date
ES2117560A1 ES2117560A1 (es) 1998-08-01
ES2117560B1 true ES2117560B1 (es) 1999-02-16

Family

ID=23640649

Family Applications (1)

Application Number Title Priority Date Filing Date
ES09600759A Expired - Fee Related ES2117560B1 (es) 1995-03-31 1996-03-29 Decodificador y metodo para el mismo.

Country Status (6)

Country Link
US (1) US6215831B1 (es)
CA (1) CA2171922C (es)
DE (1) DE19612715A1 (es)
ES (1) ES2117560B1 (es)
GB (1) GB2299491B (es)
MX (1) MX9601206A (es)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0904639B1 (en) * 1996-06-13 2001-05-16 Nortel Networks Limited Wide-area wireless distribution system
US6438180B1 (en) * 1997-05-09 2002-08-20 Carnegie Mellon University Soft and hard sequence detection in ISI memory channels
WO2000044142A1 (en) * 1999-01-20 2000-07-27 Broadcom Corporation Trellis decoder with correction of pair swaps, for use in gigabit ethernet transceivers
US6452984B1 (en) * 1999-02-25 2002-09-17 Lsi Logic Corporation Metric biasing for maximum likelihood sequence estimators
US6758435B2 (en) * 1999-12-09 2004-07-06 Rheinmetall W & M Gmbh Guide assembly for a missile
US7035790B2 (en) * 2000-06-02 2006-04-25 Canon Kabushiki Kaisha Speech processing system
US7072833B2 (en) * 2000-06-02 2006-07-04 Canon Kabushiki Kaisha Speech processing system
US7010483B2 (en) * 2000-06-02 2006-03-07 Canon Kabushiki Kaisha Speech processing system
US6813322B2 (en) * 2001-04-26 2004-11-02 Telefonaktiebolaget L.M. Ericsson (Publ) Soft output value biasing
JP3532884B2 (ja) * 2001-05-18 2004-05-31 松下電器産業株式会社 ビタビ復号器
US20030073416A1 (en) * 2001-10-17 2003-04-17 Shinichiro Ohmi Diversity apparatus and method therefor
MXPA04005171A (es) * 2001-11-29 2004-08-11 Qualcomm Inc Metodo y aparato para determinar la tasa de probabilidad logaritmica con precodificacion.
JP3817470B2 (ja) * 2001-12-04 2006-09-06 シャープ株式会社 信号評価装置および信号評価方法
US7154965B2 (en) 2002-10-08 2006-12-26 President And Fellows Of Harvard College Soft detection of data symbols in the presence of intersymbol interference and timing error
US7733988B2 (en) * 2005-10-28 2010-06-08 Alcatel-Lucent Usa Inc. Multiframe control channel detection for enhanced dedicated channel
US8165224B2 (en) 2007-03-22 2012-04-24 Research In Motion Limited Device and method for improved lost frame concealment
AU2007237313A1 (en) * 2007-12-03 2009-06-18 Canon Kabushiki Kaisha Improvement for error correction in distributed vdeo coding
US7895146B2 (en) * 2007-12-03 2011-02-22 Microsoft Corporation Time modulated generative probabilistic models for automated causal discovery that monitors times of packets
US8391408B2 (en) * 2008-05-06 2013-03-05 Industrial Technology Research Institute Method and apparatus for spatial mapping matrix searching
WO2010027136A1 (en) * 2008-09-03 2010-03-11 Lg Electronics Inc. Realy station and method of operating the same
KR101442259B1 (ko) * 2008-09-03 2014-09-25 엘지전자 주식회사 무선통신 시스템에서 중계기의 동작 방법
US9195533B1 (en) 2012-10-19 2015-11-24 Seagate Technology Llc Addressing variations in bit error rates amongst data storage segments
US8732555B2 (en) 2012-10-19 2014-05-20 Seagate Technology Llc Addressing variations in bit error rates amongst data storage segments
US10552252B2 (en) 2016-08-29 2020-02-04 Seagate Technology Llc Patterned bit in error measurement apparatus and method

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4709377A (en) * 1985-03-13 1987-11-24 Paradyne Viterbi decoder for wireline modems
US4833693A (en) * 1985-11-21 1989-05-23 Codex Corporation Coded modulation system using interleaving for decision-feedback equalization
US4945549A (en) * 1986-11-13 1990-07-31 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Trellis coded modulation for transmission over fading mobile satellite channel
US4742533A (en) 1987-01-02 1988-05-03 Motorola, Inc. Soft decision digital communication apparatus
DE3910739C3 (de) 1989-04-03 1996-11-21 Deutsche Forsch Luft Raumfahrt Verfahren zum Verallgemeinern des Viterbi-Algorithmus und Einrichtungen zur Durchführung des Verfahrens
JP2553743B2 (ja) * 1990-07-05 1996-11-13 松下電器産業株式会社 ディジタル信号磁気記録再生装置
US5134635A (en) * 1990-07-30 1992-07-28 Motorola, Inc. Convolutional decoder using soft-decision decoding with channel state information
US5214675A (en) 1991-07-02 1993-05-25 Motorola, Inc. System and method for calculating channel gain and noise variance of a communication channel
JP2876497B2 (ja) * 1991-08-23 1999-03-31 松下電器産業株式会社 誤り訂正符復号化方法およびその装置
DE4340387C1 (de) * 1993-11-26 1994-12-22 Siemens Ag Verfahren zur codierten Übertragung von Sprachsignalen
CA2131242C (en) * 1994-08-31 1999-02-16 Masao Ikekawa Apparatus for error-correct decoding in a digital data communications system

Also Published As

Publication number Publication date
DE19612715A1 (de) 1996-10-10
GB2299491A (en) 1996-10-02
GB2299491B (en) 1999-10-06
CA2171922A1 (en) 1996-10-01
ES2117560A1 (es) 1998-08-01
CA2171922C (en) 2001-12-11
GB9606236D0 (en) 1996-05-29
MX9601206A (es) 1997-08-30
US6215831B1 (en) 2001-04-10

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