ES2127229T3 - Resolucion de ambiguedad tributaria para controlar una memoria elastica. - Google Patents

Resolucion de ambiguedad tributaria para controlar una memoria elastica.

Info

Publication number
ES2127229T3
ES2127229T3 ES93107959T ES93107959T ES2127229T3 ES 2127229 T3 ES2127229 T3 ES 2127229T3 ES 93107959 T ES93107959 T ES 93107959T ES 93107959 T ES93107959 T ES 93107959T ES 2127229 T3 ES2127229 T3 ES 2127229T3
Authority
ES
Spain
Prior art keywords
tax
control
elastic memory
ambiguity resolution
ambiguity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES93107959T
Other languages
English (en)
Inventor
Ertugrul Baydar
William Bernard Weeber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Nokia Inc
Original Assignee
Alcatel SA
Nokia Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel SA, Nokia Inc filed Critical Alcatel SA
Application granted granted Critical
Publication of ES2127229T3 publication Critical patent/ES2127229T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0623—Synchronous multiplexing systems, e.g. synchronous digital hierarchy/synchronous optical network (SDH/SONET), synchronisation with a pointer process
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/12—Indexing scheme relating to groups G06F5/12 - G06F5/14
    • G06F2205/123—Contention resolution, i.e. resolving conflicts between simultaneous read and write operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Apparatus For Radiation Diagnosis (AREA)
  • Facsimile Scanning Arrangements (AREA)
  • Medical Treatment And Welfare Office Work (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

LAS DIRECCIONES DE LECTURA Y ESCRITURA DE LOS LADOS LOCALES Y DE LINEA DE UNA MEMORIA ELASTICA SE COMPARAN DOS VECES POR LO MENOS PARA DETERMINAR CUALQUIER AMBIGUEDAD EN LA COMPARACION Y, SI SE DETERMINARA, REALIZAR CUALQUIER AJUSTE DEL PUNTERO QUE DE OTRO MODO SE HUBIERAN HECHO.
ES93107959T 1992-05-21 1993-05-15 Resolucion de ambiguedad tributaria para controlar una memoria elastica. Expired - Lifetime ES2127229T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/887,348 US5706299A (en) 1992-05-21 1992-05-21 Sonet tributary ambiguity resolution for elastic store control

Publications (1)

Publication Number Publication Date
ES2127229T3 true ES2127229T3 (es) 1999-04-16

Family

ID=25390953

Family Applications (1)

Application Number Title Priority Date Filing Date
ES93107959T Expired - Lifetime ES2127229T3 (es) 1992-05-21 1993-05-15 Resolucion de ambiguedad tributaria para controlar una memoria elastica.

Country Status (6)

Country Link
US (1) US5706299A (es)
EP (1) EP0570877B1 (es)
AT (1) ATE176112T1 (es)
CA (1) CA2096717C (es)
DE (1) DE69323111T2 (es)
ES (1) ES2127229T3 (es)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6145061A (en) * 1998-01-07 2000-11-07 Tandem Computers Incorporated Method of management of a circular queue for asynchronous access
FI982040A7 (fi) 1998-09-22 2000-03-23 Nokia Multimedia Network Terminals Oy Menetelmä ja laite datavirran synkronoimiseksi
JP3818884B2 (ja) * 2001-09-19 2006-09-06 富士通株式会社 伝送装置
EP1396786A1 (en) * 2002-09-03 2004-03-10 STMicroelectronics Limited Bridge circuit for use in retiming in a semiconductor integrated circuit
US7839885B2 (en) * 2005-04-25 2010-11-23 Lsi Corporation Connection memory for tributary time-space switches

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4054747A (en) * 1976-05-20 1977-10-18 Gte Automatic Electric Laboratories Incorporated Data buffer
US4748588A (en) * 1985-12-18 1988-05-31 International Business Machines Corp. Fast data synchronizer
EP0396669B1 (en) * 1988-10-14 1995-06-28 Digital Equipment Corporation Method and apparatus for detecting impending overflow and/or underrun of elasticity buffer
US5142529A (en) * 1988-12-09 1992-08-25 Transwitch Corporation Method and means for transferring a data payload from a first SONET signal to a SONET signal of different frequency
US4928275A (en) * 1989-05-26 1990-05-22 Northern Telecom Limited Synchronization of asynchronous data signals
US5210762A (en) * 1991-10-02 1993-05-11 Alcatel Network Systems, Inc. Sonet pointer interpretation system and method

Also Published As

Publication number Publication date
DE69323111D1 (de) 1999-03-04
CA2096717C (en) 1999-02-16
DE69323111T2 (de) 1999-07-01
EP0570877A1 (en) 1993-11-24
US5706299A (en) 1998-01-06
ATE176112T1 (de) 1999-02-15
EP0570877B1 (en) 1999-01-20
CA2096717A1 (en) 1993-11-22

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