ES2135267T3 - Modulo de chip. - Google Patents

Modulo de chip.

Info

Publication number
ES2135267T3
ES2135267T3 ES96945838T ES96945838T ES2135267T3 ES 2135267 T3 ES2135267 T3 ES 2135267T3 ES 96945838 T ES96945838 T ES 96945838T ES 96945838 T ES96945838 T ES 96945838T ES 2135267 T3 ES2135267 T3 ES 2135267T3
Authority
ES
Spain
Prior art keywords
contact
chip
semiconductor chip
contact layer
union
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96945838T
Other languages
English (en)
Inventor
Michael Huber
Peter Stampka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19541072A external-priority patent/DE19541072A1/de
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Application granted granted Critical
Publication of ES2135267T3 publication Critical patent/ES2135267T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

LA INVENCION SE REFIERE A UN MODULO DE CHIP (1) CON UNA CAPA DE CONTACTOS (2) FABRICADA DE UN MATERIAL CONDUCTOR DE LA ELECTRICIDAD Y QUE PRESENTA MULTIPLES ELEMENTOS DE CONTACTO (4), PROVISTOS EN SU CARA ANTERIOR DE SUPERFICIES DE CONTACTO (3) Y CON UN CHIP SEMICONDUCTOR (7) CON CONEXIONES DEL CHIP COLOCADAS CONJUNTAMENTE SOBRE LA SUPERFICIE PRINCIPAL (5) DEL CHIP SEMICONDUCTOR (7), UNIDAS ELECTRICAMENTE CON LA CARA POSTERIOR DE LOS ELEMENTOS DE CONTACTO (4), ASOCIADOS A LA CONEXION DEL CHIP, MEDIANTE HILOS DE UNION (6) QUE POSEEN UNA LONGITUD MAXIMA DE MONTAJE. ADICIONALMENTE SE PREVE ENTRE LA CAPA DE CONTACTOS (2) CONDUCTORA DE LA ELECTRICIDAD Y EL CHIP SEMICONDUCTOR (7) UNA PELICULA AISLANTE (10) DELGADA DE UN MATERIAL AISLANTE ELECTRICO, PROVISTA DE MULTIPLES AGUJEROS DE UNION (9), EN LA CUAL LOS AGUJEROS DE UNION (9) SE CONSTRUYEN, EN CUANTO A SU DISPOSICION, FORMA, CANTIDAD, ASI COMO CORRESPONDENCIA CON UN DETERMINADO ELEMENTO DE CONTACTO (4) DE LA CAPA DE CONTACTOS, DE TAL FORMA QUESE EFECTUE UN CONTACTO DE LAS CONEXIONES DEL CHIP CON CADA ELEMENTO DE CONTACTO CORRESPONDIENTE (4) DE LA CAPA DE CONTACTOS (2), EN CUALQUIER POSICION Y CONTENIDO SUPERFICIAL DEL CHIP SEMICONDUCTOR (7) FIJADO.
ES96945838T 1995-11-03 1996-10-28 Modulo de chip. Expired - Lifetime ES2135267T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19541072A DE19541072A1 (de) 1995-11-03 1995-11-03 Chipmodul
US09/071,797 US6025997A (en) 1995-11-03 1998-05-04 Chip module for semiconductor chips having arbitrary footprints

Publications (1)

Publication Number Publication Date
ES2135267T3 true ES2135267T3 (es) 1999-10-16

Family

ID=26020070

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96945838T Expired - Lifetime ES2135267T3 (es) 1995-11-03 1996-10-28 Modulo de chip.

Country Status (1)

Country Link
ES (1) ES2135267T3 (es)

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