ES2150935T3 - Circuito integrado para un procesador piramidal. - Google Patents

Circuito integrado para un procesador piramidal.

Info

Publication number
ES2150935T3
ES2150935T3 ES93900740T ES93900740T ES2150935T3 ES 2150935 T3 ES2150935 T3 ES 2150935T3 ES 93900740 T ES93900740 T ES 93900740T ES 93900740 T ES93900740 T ES 93900740T ES 2150935 T3 ES2150935 T3 ES 2150935T3
Authority
ES
Spain
Prior art keywords
filter
input signal
unfiltered
signals
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES93900740T
Other languages
English (en)
Inventor
Der Wal Gootzen S Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sarnoff Corp
Original Assignee
Sarnoff Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sarnoff Corp filed Critical Sarnoff Corp
Application granted granted Critical
Publication of ES2150935T3 publication Critical patent/ES2150935T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00—Image enhancement or restoration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2200/00—Indexing scheme for image data processing or generation, in general
    • G06T2200/28—Indexing scheme for image data processing or generation, in general involving image processing hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/20—Special algorithmic details
    • G06T2207/20016—Hierarchical, coarse-to-fine, multiscale or multiresolution image processing; Pyramid transform
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/20—Special algorithmic details
    • G06T2207/20024—Filtering details

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Image Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Studio Circuits (AREA)

Abstract

UN CIRCUITO INTEGRADO (IC) PARA APLICAR UNA VARIEDAD DE FILTROS DE MULTIRRESOLUCION EN UN PROCESADOR DE IMAGENES COMPRENDE UN FILTRO BIDIMENSIONAL SEPARABLE, SIMETRICO Y PROGRAMABLE (110). LA SEÑAL DE ENTRADA AL FILTRO PUEDE SER UNA SEÑAL DE ENTRADA APLICADA AL IC O UNA COMBINACION DE TALES DOS SEÑALES. LA CIRCUITERIA EN EL IC PUEDE SER PROGRAMADA PARA IMPLICAR VALORES DE PIXEL ALREDEDOR DE LOS BORDES DE LAS IMAGENES BIDIMENSIONALES PROCESADAS POR EL FILTRO. EL FILTRO PREVE UNA SEÑAL DE SALIDA ASI COMO CADA UNA DE LAS SEÑALES NO FILTRADAS DE UNA LINEA DE RETARDO DERIVADA DE UN FILTRO QUE COMBINA LINEAS SUCESIVAS DE LA IMAGEN.EL IC TAMBIEN COMPRENDE UNA UNIDAD LOGICA Y ARITMETICA EN LA QUE LA SEÑAL DE SALIDA FILTRADA PUEDE COMBINARSE CON UNA SEÑAL DE ENTRADA NO FILTRADA O UNA DE LAS SEÑALES DE DERIVACION NO FILTRADA.
ES93900740T 1991-12-11 1992-12-04 Circuito integrado para un procesador piramidal. Expired - Lifetime ES2150935T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/805,149 US5359674A (en) 1991-12-11 1991-12-11 Pyramid processor integrated circuit
PCT/US1992/010337 WO1993012507A1 (en) 1991-12-11 1992-12-04 Pyramid processor integrated circuit

Publications (1)

Publication Number Publication Date
ES2150935T3 true ES2150935T3 (es) 2000-12-16

Family

ID=25190794

Family Applications (1)

Application Number Title Priority Date Filing Date
ES93900740T Expired - Lifetime ES2150935T3 (es) 1991-12-11 1992-12-04 Circuito integrado para un procesador piramidal.

Country Status (5)

Country Link
US (2) US5359674A (es)
EP (1) EP0571607B1 (es)
DE (1) DE69231518T2 (es)
ES (1) ES2150935T3 (es)
WO (1) WO1993012507A1 (es)

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US6044166A (en) * 1995-01-17 2000-03-28 Sarnoff Corporation Parallel-pipelined image processing system
CA2211079A1 (en) * 1995-01-17 1996-07-25 David Sarnoff Research Center, Inc. Method and apparatus for detecting object movement within an image sequence
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US5719966A (en) * 1996-03-29 1998-02-17 David Sarnoff Research Center, Inc. Apparatus for assessing the visiblity of differences between two image sequences
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US5963675A (en) * 1996-04-17 1999-10-05 Sarnoff Corporation Pipelined pyramid processor for image processing systems
US5717512A (en) * 1996-05-15 1998-02-10 Chmielewski, Jr.; Thomas A. Compact image steering and focusing device
US6018597A (en) * 1997-03-21 2000-01-25 Intermec Ip Corporation Method and apparatus for changing or mapping video or digital images from one image density to another
US6357045B1 (en) 1997-03-31 2002-03-12 Matsushita Electric Industrial Co., Ltd. Apparatus and method for generating a time-multiplexed channel surfing signal at television head-end sites
US5920495A (en) * 1997-05-14 1999-07-06 Cirrus Logic, Inc. Programmable four-tap texture filter
US6188381B1 (en) * 1997-09-08 2001-02-13 Sarnoff Corporation Modular parallel-pipelined vision system for real-time video processing
US6151682A (en) * 1997-09-08 2000-11-21 Sarnoff Corporation Digital signal processing circuitry having integrated timing information
US5987192A (en) * 1997-09-18 1999-11-16 Intermec Ip Corporation Method and apparatus for processing or resizing digital images, such as images of bar code symbols
US6141459A (en) * 1997-09-24 2000-10-31 Sarnoff Corporation Method and apparatus for processing image pyramid borders
US6396961B1 (en) 1997-11-12 2002-05-28 Sarnoff Corporation Method and apparatus for fixating a camera on a target point using image alignment
US6594399B1 (en) 1998-05-14 2003-07-15 Sensar, Inc. Method and apparatus for integrating multiple 1-D filters into a digital image stream interface
US6640015B1 (en) * 1998-06-05 2003-10-28 Interuniversitair Micro-Elektronica Centrum (Imec Vzw) Method and system for multi-level iterative filtering of multi-dimensional data structures
JP4150112B2 (ja) * 1998-08-24 2008-09-17 ソニー株式会社 画像データ処理方法および画像データ処理装置
WO2000013407A1 (en) * 1998-08-28 2000-03-09 Sarnoff Corporation Method and apparatus for electronically enhancing images
US6963889B1 (en) * 2000-02-24 2005-11-08 Intel Corporation Wave digital filter with low power consumption
EP1130773B1 (en) * 2000-02-29 2007-01-03 STMicroelectronics S.r.l. Decoding arrangement of the PRML type and method of filtering signals
EP1360833A1 (en) 2000-08-31 2003-11-12 Rytec Corporation Sensor and imaging system
US6678708B1 (en) * 2000-11-15 2004-01-13 Intel Corporation Method and apparatus for two-dimensional separable symmetric filtering
US6662200B2 (en) 2001-01-03 2003-12-09 Intel Corporation Multiplierless pyramid filter
US20020174154A1 (en) * 2001-03-26 2002-11-21 Tinku Acharya Two-dimensional pyramid filter architecture
US6766286B2 (en) 2001-03-28 2004-07-20 Intel Corporation Pyramid filter
US6889237B2 (en) * 2001-03-30 2005-05-03 Intel Corporation Two-dimensional pyramid filter architecture
US20020184276A1 (en) * 2001-03-30 2002-12-05 Tinku Acharya Two-dimensional pyramid filter architecture
US6725247B2 (en) * 2001-04-30 2004-04-20 Intel Corporation Two-dimensional pyramid filter architecture
US6751258B2 (en) * 2001-05-30 2004-06-15 Koninklijke Philips Electronics N.V. Vertical scaling of interlaced video in the frequency domain
US6662091B2 (en) 2001-06-29 2003-12-09 Battelle Memorial Institute Diagnostics/prognostics using wireless links
NZ530434A (en) 2001-07-02 2005-01-28 Battelle Memorial Institute Intelligent microsensor module
US7750979B2 (en) * 2001-10-26 2010-07-06 Trident Mircosystems (Far East) Ltd. Pixel-data line buffer approach having variable sampling patterns
JP3838086B2 (ja) * 2001-12-12 2006-10-25 ソニー株式会社 画像処理装置およびその方法
WO2004023787A2 (en) 2002-09-06 2004-03-18 Rytec Corporation Signal intensity range transformation apparatus and method
US7672528B2 (en) * 2003-06-26 2010-03-02 Eastman Kodak Company Method of processing an image to form an image pyramid
US7356197B2 (en) * 2003-06-30 2008-04-08 Intel Corporation Variable tap filter architecture for image processing
WO2006083277A2 (en) * 2004-05-25 2006-08-10 Sarnoff Corporation Low latency pyramid processor for image processing systems
US20060103736A1 (en) * 2004-11-12 2006-05-18 Pere Obrador Sequential processing of video data
US7783125B2 (en) * 2005-07-05 2010-08-24 Hewlett-Packard Development Company, L.P. Multi-resolution processing of digital signals
US8830360B1 (en) 2010-08-25 2014-09-09 Sri International Method and apparatus for optimizing image quality based on scene content
DK177154B1 (da) * 2010-12-17 2012-03-05 Concurrent Vision Aps Method and device for parallel processing of images
US20220100466A1 (en) 2020-09-18 2022-03-31 Imagination Technologies Limited Downscaler and Method of Downscaling
GB2598917A (en) * 2020-09-18 2022-03-23 Imagination Tech Ltd Downscaler and method of downscaling

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US4622632A (en) * 1982-08-18 1986-11-11 Board Of Regents, University Of Washington Data processing system having a pyramidal array of processors
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Also Published As

Publication number Publication date
DE69231518T2 (de) 2001-05-17
WO1993012507A1 (en) 1993-06-24
EP0571607A4 (en) 1994-05-18
EP0571607A1 (en) 1993-12-01
US5359674A (en) 1994-10-25
US5561617A (en) 1996-10-01
DE69231518D1 (de) 2000-11-23
EP0571607B1 (en) 2000-10-18

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