ES2158264T3 - Metodo de transporte transparente de una señal de reloj entrante por un segmento de red, y unidad transmisora y receptora seleccionada. - Google Patents

Metodo de transporte transparente de una señal de reloj entrante por un segmento de red, y unidad transmisora y receptora seleccionada.

Info

Publication number
ES2158264T3
ES2158264T3 ES96402394T ES96402394T ES2158264T3 ES 2158264 T3 ES2158264 T3 ES 2158264T3 ES 96402394 T ES96402394 T ES 96402394T ES 96402394 T ES96402394 T ES 96402394T ES 2158264 T3 ES2158264 T3 ES 2158264T3
Authority
ES
Spain
Prior art keywords
network segment
clock signal
signal input
receiver unit
transportation method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96402394T
Other languages
English (en)
Inventor
Der Putten Frank Octaaf Van
Paul Marie Pierre Spruyt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Nokia Inc
Original Assignee
Alcatel SA
Nokia Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel SA, Nokia Inc filed Critical Alcatel SA
Application granted granted Critical
Publication of ES2158264T3 publication Critical patent/ES2158264T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Electromechanical Clocks (AREA)
  • Electric Clocks (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)

Abstract

PARA TRANSPORTAR CON TRANSPARENCIA UNA SEÑAL DE RELOJ DE ENTRADA (CLK2) CON UNA FRECUENCIA CONOCIDA SOBRE UN SEGMENTO DE RED EN EL QUE LA TRANSMISION ENTRE UN TRANSMISOR (TX) Y UN RECEPTOR (RX) OPERA DE FORMA SINCRONICA CON RELACION A UNA SEÑAL DE RELOJ DE TRANSMISION (CLK1) Y LA SEÑAL DEL RELOJ DEL RECEPTOR (CLK1 ) QUE ESTA SINCRONIZADAS, EL TRANSMISOR MIDE LA DIFERENCIA DE FASE (P) ENTRE LA SEÑAL DE RELOJ DE ENTRADA (CLK2) Y UNA SEÑAL DE REFERENCIA (R) OBTENIDA DESDE LA SEÑAL DE RELOJ DE TRANSMISION (CLK1). LA DIFERENCIA DE FASE MEDIDA (P) ES COMUNICADA AL RECEPTOR (RX) Y UTILIZADA EN EL PARA GENERAR UNA COPIA (CLK2).
ES96402394T 1996-11-08 1996-11-08 Metodo de transporte transparente de una señal de reloj entrante por un segmento de red, y unidad transmisora y receptora seleccionada. Expired - Lifetime ES2158264T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP96402394A EP0841767B1 (en) 1996-11-08 1996-11-08 Method to transparently transport an incoming clock signal over a network segment, and related transmitter and receiver unit

Publications (1)

Publication Number Publication Date
ES2158264T3 true ES2158264T3 (es) 2001-09-01

Family

ID=8225311

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96402394T Expired - Lifetime ES2158264T3 (es) 1996-11-08 1996-11-08 Metodo de transporte transparente de una señal de reloj entrante por un segmento de red, y unidad transmisora y receptora seleccionada.

Country Status (7)

Country Link
EP (1) EP0841767B1 (es)
JP (1) JP3825156B2 (es)
AT (1) ATE202879T1 (es)
AU (1) AU732219B2 (es)
DE (1) DE69613703T2 (es)
ES (1) ES2158264T3 (es)
IL (1) IL122049A (es)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3622510B2 (ja) * 1998-06-19 2005-02-23 富士通株式会社 ディジタル加入者線伝送方法、ａｄｓｌトランシーバ、チャンネルアナリシステ方法及びａｄｓｌ装置
DE60041470D1 (de) 1999-05-11 2009-03-19 Canon Kk Verfahren und Vorrichtung zur Synchronisierung zwischen zwei Netzwerken
FR2795261A1 (fr) 1999-06-21 2000-12-22 Canon Kk Procede et dispositif de determination d'un instant de reference lie a la reception de donnees
US7227918B2 (en) * 2000-03-14 2007-06-05 Altera Corporation Clock data recovery circuitry associated with programmable logic device circuitry
JP3398709B2 (ja) * 2000-06-06 2003-04-21 宮城日本電気株式会社 バーストフレーム転送システム
GB2387516B (en) 2002-04-11 2005-03-09 Cambridge Broadband Ltd Communication system
US7106224B2 (en) 2002-08-14 2006-09-12 Standard Microsystems Corporation Communication system and method for sample rate converting data onto or from a network using a high speed frequency comparison technique
US7272202B2 (en) 2002-08-14 2007-09-18 Standard Microsystems Corp. Communication system and method for generating slave clocks and sample clocks at the source and destination ports of a synchronous network using the network frame rate
US7158596B2 (en) 2002-08-14 2007-01-02 Standard Microsystems Corp. Communication system and method for sending and receiving data at a higher or lower sample rate than a network frame rate using a phase locked loop
AU2003259767A1 (en) * 2002-08-14 2004-03-03 Oasis Silicon Systems Communication system for sending and receiving data onto and from a network at a network frame rate using a phase locked loop, sample rate conversion, or synchronizing clocks generated from the network frame rate
JP4070763B2 (ja) 2004-11-24 2008-04-02 富士通株式会社 Ａｔｍ装置間通信支援システム、データ送信支援装置、データ送信方法、およびコンピュータプログラム
US7421048B2 (en) * 2005-01-20 2008-09-02 Vixs Systems, Inc. System and method for multimedia delivery in a wireless environment
JP2009088793A (ja) 2007-09-28 2009-04-23 Fujitsu Ltd 同期用システム、同期信号送信装置、クロック供給装置、及び同期方法
JP2008182711A (ja) * 2008-01-24 2008-08-07 Fujitsu Ltd Ａｔｍ装置間通信支援システム、データ送信支援装置、データ送信方法、およびコンピュータプログラム
FR2981529B1 (fr) * 2011-10-17 2014-07-04 Alstom Technology Ltd Procede de synchronisation d'un appareillage connecte a un reseau de communication

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260978A (en) * 1992-10-30 1993-11-09 Bell Communications Research, Inc. Synchronous residual time stamp for timing recovery in a broadband network
GB9419611D0 (en) * 1994-09-29 1994-11-16 Plessey Telecomm Constant bit rate synchronisation

Also Published As

Publication number Publication date
ATE202879T1 (de) 2001-07-15
DE69613703T2 (de) 2002-05-16
IL122049A0 (en) 1998-03-10
AU4369397A (en) 1998-05-14
JPH10233767A (ja) 1998-09-02
AU732219B2 (en) 2001-04-12
DE69613703D1 (de) 2001-08-09
EP0841767A1 (en) 1998-05-13
EP0841767B1 (en) 2001-07-04
IL122049A (en) 2000-11-21
JP3825156B2 (ja) 2006-09-20

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