ES2163045T3 - Procedimiento para la generacion de las regiones fuente de un campo de celulas de memoria flash-eeprom. - Google Patents

Procedimiento para la generacion de las regiones fuente de un campo de celulas de memoria flash-eeprom.

Info

Publication number
ES2163045T3
ES2163045T3 ES96938008T ES96938008T ES2163045T3 ES 2163045 T3 ES2163045 T3 ES 2163045T3 ES 96938008 T ES96938008 T ES 96938008T ES 96938008 T ES96938008 T ES 96938008T ES 2163045 T3 ES2163045 T3 ES 2163045T3
Authority
ES
Spain
Prior art keywords
flash
procedure
generating
memory cell
eeprom memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96938008T
Other languages
English (en)
Inventor
Martin Kerber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of ES2163045T3 publication Critical patent/ES2163045T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

EN UNA CELULA DE ALMACENAMIENTO FLASH (1) SE REALIZA EL AISLAMIENTO DE CAMPO MEDIANTE UNA ESTRUCTURA AISLANTE DE TRES CAPAS OXIDO - POLISILICIO - OXIDO (11, 12, 13). LA IMPLANTACION AUTOAJUSTADA DE SUSTANCIAS DE IMPUREZAS EN RELACION CON LAS LINEAS DE PALABRA (6) DE DOS CELULAS DE ALMACENAMIENTO CONTIGUAS A FIN DE GENERAR LAS REGIONES FUENTE (3) Y LAS PISTAS DE CONEXION FUENTE, PROPORCIONA UNA PEQUEÑA SUPERFICIE PARA LA CELULA DE ALMACENAMIENTO (1). EL AISLAMIENTO DE CAMPO PROPUESTO POR LA INVENCION GENERA UNA CAPACIDAD ENTRE LA REGION DE IMPUREZAS (8) Y LA CAPA DE POLISILICIO (12) DE LA CAPA DE AISLAMIENTO QUE MEJORA LAS CARACTERISTICAS DE LECTURA DE LA CELULA DE ALMACENAMIENTO (1).
ES96938008T 1995-09-19 1996-09-10 Procedimiento para la generacion de las regiones fuente de un campo de celulas de memoria flash-eeprom. Expired - Lifetime ES2163045T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19534778A DE19534778C1 (de) 1995-09-19 1995-09-19 Verfahren zum Erzeugen der Sourcebereiche eines Flash-EEPROM-Speicherzellenfeldes

Publications (1)

Publication Number Publication Date
ES2163045T3 true ES2163045T3 (es) 2002-01-16

Family

ID=7772593

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96938008T Expired - Lifetime ES2163045T3 (es) 1995-09-19 1996-09-10 Procedimiento para la generacion de las regiones fuente de un campo de celulas de memoria flash-eeprom.

Country Status (10)

Country Link
US (1) US6090665A (es)
EP (1) EP0852066B1 (es)
JP (1) JPH11512567A (es)
KR (1) KR19990045751A (es)
CN (1) CN1196831A (es)
AT (1) ATE204404T1 (es)
DE (2) DE19534778C1 (es)
ES (1) ES2163045T3 (es)
RU (1) RU2168241C2 (es)
WO (1) WO1997011489A1 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320784B1 (en) * 2000-03-14 2001-11-20 Motorola, Inc. Memory cell and method for programming thereof
US6698295B1 (en) * 2000-03-31 2004-03-02 Shipley Company, L.L.C. Microstructures comprising silicon nitride layer and thin conductive polysilicon layer
US7026697B2 (en) * 2000-03-31 2006-04-11 Shipley Company, L.L.C. Microstructures comprising a dielectric layer and a thin conductive layer
US6624027B1 (en) * 2002-05-09 2003-09-23 Atmel Corporation Ultra small thin windows in floating gate transistors defined by lost nitride spacers
CN106298790B (zh) * 2016-09-18 2018-11-27 上海华虹宏力半导体制造有限公司 快闪存储器的形成方法
CN110838491B (zh) * 2018-08-15 2022-05-10 无锡华润上华科技有限公司 半导体结构及其制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4513397A (en) * 1982-12-10 1985-04-23 Rca Corporation Electrically alterable, nonvolatile floating gate memory device
SE8301227L (sv) * 1982-03-09 1983-09-10 Rca Corp Halvledarminne med frisvevande styre
GB2126788B (en) * 1982-03-09 1985-06-19 Rca Corp An electrically alterable nonvolatile floating gate memory device
SU1487759A1 (ru) * 1985-10-27 1992-09-23 Организация П/Я А-1889 Способ изготовлени структур МДП-интегральных схем
DE3816358A1 (de) * 1988-05-13 1989-11-23 Eurosil Electronic Gmbh Nichtfluechtige speicherzelle und verfahren zur herstellung
JP3065164B2 (ja) * 1992-03-18 2000-07-12 富士通株式会社 半導体装置及びその製造方法
US5297082A (en) * 1992-11-12 1994-03-22 Micron Semiconductor, Inc. Shallow trench source eprom cell
US5858821A (en) * 1993-05-12 1999-01-12 Micron Technology, Inc. Method of making thin film transistors
US5598367A (en) * 1995-06-07 1997-01-28 International Business Machines Corporation Trench EPROM
US5861333A (en) * 1996-10-25 1999-01-19 United Microelectonics Corp. Method of tunnel window process for EEPROM cell technology
US5930627A (en) * 1997-05-05 1999-07-27 Chartered Semiconductor Manufacturing Company, Ltd. Process improvements in self-aligned polysilicon MOSFET technology using silicon oxynitride
US5888870A (en) * 1997-10-22 1999-03-30 Advanced Micro Devices, Inc. Memory cell fabrication employing an interpoly gate dielectric arranged upon a polished floating gate

Also Published As

Publication number Publication date
WO1997011489A1 (de) 1997-03-27
RU2168241C2 (ru) 2001-05-27
CN1196831A (zh) 1998-10-21
DE19534778C1 (de) 1997-04-03
ATE204404T1 (de) 2001-09-15
DE59607510D1 (de) 2001-09-20
US6090665A (en) 2000-07-18
EP0852066B1 (de) 2001-08-16
JPH11512567A (ja) 1999-10-26
KR19990045751A (ko) 1999-06-25
EP0852066A1 (de) 1998-07-08

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