ES219294U - Disposition perfected in sets for the realization of electric-electronic circuits. (Machine-translation by Google Translate, not legally binding) - Google Patents
Disposition perfected in sets for the realization of electric-electronic circuits. (Machine-translation by Google Translate, not legally binding)Info
- Publication number
- ES219294U ES219294U ES0219294U ES219294U ES219294U ES 219294 U ES219294 U ES 219294U ES 0219294 U ES0219294 U ES 0219294U ES 219294 U ES219294 U ES 219294U ES 219294 U ES219294 U ES 219294U
- Authority
- ES
- Spain
- Prior art keywords
- realization
- translation
- assembly
- legally binding
- google translate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000000295 complement effect Effects 0.000 abstract 2
- 230000000712 assembly Effects 0.000 abstract 1
- 238000000429 assembly Methods 0.000 abstract 1
Landscapes
- Combinations Of Printed Boards (AREA)
- Connector Housings Or Holding Contact Members (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Abstract
Improved arrangement in conjunction with the realization of electronic electrical circuits, of the type of which involve panels that are provided with one; assemblies of holes for the assembly with electrical connection of component modules, characterized in that each panel determines itself on all its sides recesses of a dovetail cross section, while the housings of the respective complementary electronic electrical units determine pins of conformation in double dovetail, so that by means of its fitting in the mentioned ones the different units are supported peripherally on the panel and firmly arrived at it, with which they constitute a perfect unit of assembly; while on the other hand said remembrances are uniformly distributed so that, by arranging several panels juxtaposed on any of their sides, they face each other in opposition, allowing the identical fitting of the mentioned spikes, so that the complementary units remain the same form while making the assembly effective between the various panels. (Machine-translation by Google Translate, not legally binding)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| ES1976219294U ES219294Y (en) | 1976-03-03 | 1976-03-03 | PERFECTED ARRANGEMENT IN SETS FOR THE REALIZATION OF ELECTRIC-ELECTRONIC CIRCUITS. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| ES1976219294U ES219294Y (en) | 1976-03-03 | 1976-03-03 | PERFECTED ARRANGEMENT IN SETS FOR THE REALIZATION OF ELECTRIC-ELECTRONIC CIRCUITS. |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| ES219294U true ES219294U (en) | 1976-12-01 |
| ES219294Y ES219294Y (en) | 1978-04-01 |
Family
ID=8382420
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES1976219294U Expired ES219294Y (en) | 1976-03-03 | 1976-03-03 | PERFECTED ARRANGEMENT IN SETS FOR THE REALIZATION OF ELECTRIC-ELECTRONIC CIRCUITS. |
Country Status (1)
| Country | Link |
|---|---|
| ES (1) | ES219294Y (en) |
-
1976
- 1976-03-03 ES ES1976219294U patent/ES219294Y/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| ES219294Y (en) | 1978-04-01 |
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