ES232033A1 - Procedure for the preparation of printed circuits for electrotechnical (Machine-translation by Google Translate, not legally binding) - Google Patents

Procedure for the preparation of printed circuits for electrotechnical (Machine-translation by Google Translate, not legally binding)

Info

Publication number
ES232033A1
ES232033A1 ES232033A ES232033A ES232033A1 ES 232033 A1 ES232033 A1 ES 232033A1 ES 232033 A ES232033 A ES 232033A ES 232033 A ES232033 A ES 232033A ES 232033 A1 ES232033 A1 ES 232033A1
Authority
ES
Spain
Prior art keywords
translation
procedure
machine
legally binding
google translate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES232033A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefunken AG
Original Assignee
Telefunken AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefunken AG filed Critical Telefunken AG
Priority to ES232033A priority Critical patent/ES232033A1/en
Publication of ES232033A1 publication Critical patent/ES232033A1/en
Expired legal-status Critical Current

Links

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

Procedure for making printed circuits, for electrical engineering, according to which the circuit is printed with varnish on the metallic layer of a metallized insulating material, protecting with the varnish during the next treatment the applied acid to suppress the metallic surfaces, the conductive lines of the connection against the action of the acid, and according to which, after the acid treatment, the elements of the circuit are connected to the printed circuit by means of dip welding. The process is characterized in that the non-volatile components of the protective varnish are composed wholly or essentially of a solid product that facilitates welding. (Machine-translation by Google Translate, not legally binding)
ES232033A 1956-11-21 1956-11-21 Procedure for the preparation of printed circuits for electrotechnical (Machine-translation by Google Translate, not legally binding) Expired ES232033A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
ES232033A ES232033A1 (en) 1956-11-21 1956-11-21 Procedure for the preparation of printed circuits for electrotechnical (Machine-translation by Google Translate, not legally binding)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ES232033A ES232033A1 (en) 1956-11-21 1956-11-21 Procedure for the preparation of printed circuits for electrotechnical (Machine-translation by Google Translate, not legally binding)

Publications (1)

Publication Number Publication Date
ES232033A1 true ES232033A1 (en) 1957-05-16

Family

ID=65594209

Family Applications (1)

Application Number Title Priority Date Filing Date
ES232033A Expired ES232033A1 (en) 1956-11-21 1956-11-21 Procedure for the preparation of printed circuits for electrotechnical (Machine-translation by Google Translate, not legally binding)

Country Status (1)

Country Link
ES (1) ES232033A1 (en)

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