ES2549656T3 - Entrelazador de bits para un sistema BICM con códigos de tipo QC LDPC - Google Patents

Entrelazador de bits para un sistema BICM con códigos de tipo QC LDPC Download PDF

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ES2549656T3
ES2549656T3 ES12785964.3T ES12785964T ES2549656T3 ES 2549656 T3 ES2549656 T3 ES 2549656T3 ES 12785964 T ES12785964 T ES 12785964T ES 2549656 T3 ES2549656 T3 ES 2549656T3
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cyclic
bits
permutation
code word
blocks
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Mihail Petrov
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Panasonic Corp
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H03M13/356—Unequal error protection [UEP]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/6325—Error control coding in combination with demodulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6552—DVB-T2
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6555—DVB-C2
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H04L1/0058—Block-coded modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception
    • H04L1/06—Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
    • H04L1/0606—Space-frequency coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception
    • H04L1/06—Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
    • H04L1/0618—Space-time coding

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

Un método de entrelazado de bits para el entrelazado de una palabra de código generada por una codificación cuasi cíclica de comprobación de paridad de baja densidad, QC LDPC, que emplee Q×Q matrices circulantes, incluyendo una codificación QC LDPC de acumulación repetitiva, comprendiendo el método de entrelazado de bits: una etapa de permutación del bloque cíclico de aplicación de un proceso de permutación del bloque cíclico a la palabra de código compuesta de N bloques cíclicos consistente cada uno en Q bits del bloque cíclico, de modo que redispongan los N bloques cíclicos de acuerdo con una regla de permutación del bloque cíclico que define una reordenación de los N bloques cíclicos; una etapa de permutación de bits de aplicación de un proceso de permutación de bits a la palabra de código, de modo que redispongan los bits de la palabra de código, después del proceso de permutación del bloque cíclico; y una etapa de división para la división de la palabra de código, después del proceso de permutación de bits, en una pluralidad de palabras de constelación, estando compuesta cada una de las palabras de constelación por M bits, en donde F es un divisor de M y Q, N no es un múltiplo de M/F, N' es igual a (M/F)×suelo(N/(M/F)), después del proceso de permutación del bloque cíclico, se selecciona un subconjunto de N' bloques cíclicos de entre los N bloques cíclicos de la palabra de código y se divide en F×N'/M secciones, consistiendo cada una de las secciones en M/F bloques cíclicos diferentes, los (N-N') bloques cíclicos no incluidos en el subconjunto seleccionado de N' bloques cíclicos se excluyen del proceso de permutación de bits e incluyen una sección de paridad de la palabra de código, y en la etapa de permutación de bits, para cada sección, el proceso de permutación de bits se aplica a los Q×(M/F) bits de una sección dada de modo que M bits, que incluyen F bits de bloques cíclicos de cada uno de los M/F bloques cíclicos diferentes, se asignan a una de las Q/F palabras de constelación asociadas a la sección dada.

Description

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ES12785964.3T 2011-05-18 2012-05-18 Entrelazador de bits para un sistema BICM con códigos de tipo QC LDPC Active ES2549656T3 (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP11004127 2011-05-18
EP11004127A EP2525498A1 (en) 2011-05-18 2011-05-18 Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
PCT/JP2012/003264 WO2012157284A1 (ja) 2011-05-18 2012-05-18 並列ビットインターリーバ

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ES2549656T3 true ES2549656T3 (es) 2015-10-30

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ES15172081T Active ES2701833T3 (es) 2011-05-18 2012-05-18 Entrelazador de bits para un sistema BICM con códigos de tipo QC LDPC
ES12785964.3T Active ES2549656T3 (es) 2011-05-18 2012-05-18 Entrelazador de bits para un sistema BICM con códigos de tipo QC LDPC
ES18185973T Active ES2902352T3 (es) 2011-05-18 2012-05-18 Entrelazador de bits para un sistema BICM con códigos de tipo QC LDPC

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US (7) US9100049B2 (es)
EP (4) EP2525498A1 (es)
JP (8) JP5749799B2 (es)
CN (3) CN107094025B (es)
ES (3) ES2701833T3 (es)
HU (1) HUE026033T2 (es)
PL (1) PL2566056T3 (es)
TW (1) TWI569585B (es)
WO (1) WO2012157284A1 (es)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2525498A1 (en) 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
EP2525495A1 (en) * 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
EP3985879A1 (en) * 2014-02-20 2022-04-20 Shanghai National Engineering Research Center of Digital Television Co., Ltd. Multi-stage interleaving for ldpc codes
US9596116B2 (en) 2014-02-20 2017-03-14 Lg Electronics Inc. Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
US9602135B2 (en) * 2014-02-20 2017-03-21 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 64-symbol mapping, and bit interleaving method using same
WO2015137626A1 (en) * 2014-03-10 2015-09-17 Lg Electronics Inc. Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
KR102370903B1 (ko) * 2014-03-14 2022-03-08 삼성전자주식회사 인터리빙 깊이를 조절하기 위한 장치 및 방법
EP3232672A4 (en) 2014-12-08 2018-08-01 LG Electronics Inc. Broadcast signal transmitting device, broadcast signal receiving device, broadcast signal transmitting method, and broadcast signal receiving method
KR102287614B1 (ko) * 2015-02-12 2021-08-10 한국전자통신연구원 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 16-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102287627B1 (ko) * 2015-02-16 2021-08-10 한국전자통신연구원 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 4096-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
US9634692B2 (en) * 2015-05-19 2017-04-25 Samsung Electronics Co., Ltd. Transmitting apparatus and interleaving method thereof
US9595978B2 (en) 2015-05-19 2017-03-14 Samsung Electronics Co., Ltd. Transmitting apparatus and interleaving method thereof
US9780917B2 (en) * 2015-05-19 2017-10-03 Samsung Electronics Co., Ltd. Transmitting apparatus and mapping method thereof
US9800365B2 (en) 2015-05-19 2017-10-24 Samsung Electronics Co., Ltd. Transmitting apparatus and mapping method thereof
US9787422B2 (en) * 2015-05-19 2017-10-10 Samsung Electronics Co., Ltd. Transmitting apparatus and mapping method thereof
US9780916B2 (en) 2015-05-19 2017-10-03 Samsung Electronics Co., Ltd. Transmitting apparatus and mapping method thereof
US9692453B2 (en) 2015-05-19 2017-06-27 Samsung Electronics Co., Ltd. Transmitting apparatus and interleaving method thereof
US10484017B2 (en) * 2015-06-01 2019-11-19 Sony Corporation Data processing apparatus, and data processing method
US10275186B2 (en) * 2015-10-30 2019-04-30 Sandisk Technologies Llc System and method of data compression and data shaping
US9900105B1 (en) * 2016-10-10 2018-02-20 Tyco Electronics Subsea Communications Llc Coded modulation with amplitude and phase-shift keying having a circular constellation for variable spectral efficiency
US10979084B2 (en) 2017-01-06 2021-04-13 Nokia Technologies Oy Method and apparatus for vector based LDPC base matrix usage and generation
CN108667555B (zh) * 2017-03-29 2021-07-20 华为技术有限公司 一种相位调整方法、相关设备和通信系统
CN108173801B (zh) * 2018-02-26 2020-09-08 重庆邮电大学 一种基于星座点分类排列的索引调制传输系统
US10797727B1 (en) * 2018-09-21 2020-10-06 Xilinx, Inc. Low-density parity-check (LDPC) encode using an LDPC decoder
DE102019200256B4 (de) 2019-01-10 2020-07-30 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verschachteler
CN110324048B (zh) * 2019-06-24 2020-12-08 华中科技大学 一种通信调制系统中ra-ldpc-cc的编码方法及编码器
US12199757B1 (en) * 2023-07-20 2025-01-14 Hughes Network Systems, Llc Optimized code-split symbol constellations

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10048872A1 (de) * 2000-10-02 2002-04-25 Infineon Technologies Ag Abschnittsweise Entschachtelung
CN1288560C (zh) * 2001-11-05 2006-12-06 诺基亚有限公司 通过部分填充块交织器避免通信系统中聚集的方法和设备
KR100927144B1 (ko) * 2002-10-19 2009-11-18 삼성전자주식회사 램덤화 특성이 개선된 내부 인터리버를 가지는 디지털방송시스템의 전송장치 및 그의 전송방법
US7702968B2 (en) * 2004-02-27 2010-04-20 Qualcomm Incorporated Efficient multi-symbol deinterleaver
JP4534128B2 (ja) 2004-03-05 2010-09-01 ソニー株式会社 符号化方法および装置
US7831883B2 (en) * 2004-04-02 2010-11-09 Nortel Networks Limited LDPC encoders, decoders, systems and methods
US7281192B2 (en) * 2004-04-05 2007-10-09 Broadcom Corporation LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing
KR20060097503A (ko) * 2005-03-11 2006-09-14 삼성전자주식회사 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널인터리빙/디인터리빙 장치 및 그 제어 방법
US7584400B2 (en) * 2005-04-15 2009-09-01 Trellisware Technologies, Inc. Clash-free irregular-repeat-accumulate code
US7793190B1 (en) * 2005-08-10 2010-09-07 Trellisware Technologies, Inc. Reduced clash GRA interleavers
US7830957B2 (en) * 2006-05-02 2010-11-09 Qualcomm Incorporated Parallel bit interleaver for a wireless system
JP4856605B2 (ja) * 2006-08-31 2012-01-18 パナソニック株式会社 符号化方法、符号化装置、及び送信装置
US7783952B2 (en) * 2006-09-08 2010-08-24 Motorola, Inc. Method and apparatus for decoding data
CN101162907B (zh) * 2006-10-10 2010-11-03 华为技术有限公司 一种利用低密度奇偶校验码实现编码的方法及装置
KR101119302B1 (ko) * 2007-04-20 2012-03-19 재단법인서울대학교산학협력재단 통신 시스템에서 저밀도 패리티 검사 부호 부호화 장치 및방법
JP4976543B2 (ja) * 2007-04-27 2012-07-18 エルジー エレクトロニクス インコーポレイティド 移動通信システムにおいて下り制御チャネルを伝送する方法並びにブロックインターリーバを用いて制御チャネルを物理リソースにマッピングする方法
EP2056510B1 (en) * 2007-10-30 2013-04-03 Sony Corporation Data processing apparatus and method
JP4583431B2 (ja) 2007-11-13 2010-11-17 パナソニック株式会社 変調器及び変調方法
TWI497920B (zh) 2007-11-26 2015-08-21 Sony Corp Data processing device and data processing method
TWI538415B (zh) 2007-11-26 2016-06-11 Sony Corp Data processing device and data processing method
TWI410055B (zh) 2007-11-26 2013-09-21 Sony Corp Data processing device, data processing method and program product for performing data processing method on computer
TWI459724B (zh) 2007-11-26 2014-11-01 Sony Corp Data processing device and data processing method
JP5453308B2 (ja) * 2008-01-09 2014-03-26 アップル インコーポレイテッド 物理リソースブロックへの分散型リソースブロックインデックスのマッピング
US8161348B2 (en) * 2008-02-05 2012-04-17 Agere Systems Inc. Systems and methods for low cost LDPC decoding
ES2545782T3 (es) 2008-03-03 2015-09-15 Rai Radiotelevisione Italiana S.P.A. Patrones de permutación de bits para modulación codificada de LDPC y constelaciones QAM
WO2009116204A1 (ja) * 2008-03-18 2009-09-24 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2010024914A1 (en) * 2008-08-29 2010-03-04 Thomson Licensing System and method for reusing dvb-s2 ldpc codes in dvb-c2
CN102292917B (zh) * 2008-10-03 2015-08-26 汤姆逊许可公司 利用二元删除替代信道在awgn信道条件下将比特交织器适配于ldpc码和调制的方法和装置
US8219874B2 (en) * 2009-02-19 2012-07-10 Nec Laboratories America, Inc. Multi-dimensional LDPC coded modulation for high-speed optical transmission systems
CN101488761B (zh) * 2009-02-27 2011-01-19 北京交通大学 一种无短环无低码重码的ldpc码构造方法
US8532209B2 (en) * 2010-11-24 2013-09-10 Trellis Phase Communications, Lp Methods, apparatus, and systems for coding with constrained interleaving
CN102055485A (zh) * 2010-12-24 2011-05-11 中国人民解放军理工大学 准循环低密度奇偶校验码及其修正和线性编码方法
US8656245B2 (en) * 2011-04-13 2014-02-18 California Institute Of Technology Method of error floor mitigation in low-density parity-check codes
EP2525495A1 (en) * 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
EP2525497A1 (en) 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
EP2525498A1 (en) * 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes
EP2525496A1 (en) * 2011-05-18 2012-11-21 Panasonic Corporation Bit-interleaved coding and modulation (BICM) with quasi-cyclic LDPC codes

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