ES344523A1 - Un metodo de fabricar un dispositivo semiconductor. - Google Patents
Un metodo de fabricar un dispositivo semiconductor.Info
- Publication number
- ES344523A1 ES344523A1 ES344523A ES344523A ES344523A1 ES 344523 A1 ES344523 A1 ES 344523A1 ES 344523 A ES344523 A ES 344523A ES 344523 A ES344523 A ES 344523A ES 344523 A1 ES344523 A1 ES 344523A1
- Authority
- ES
- Spain
- Prior art keywords
- dopant
- wafer
- layer
- source
- masking layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
- H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
- H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
- H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
- H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/106—Masks, special
Landscapes
- Weting (AREA)
- Materials For Photolithography (AREA)
- Semiconductor Lasers (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US60147966A | 1966-12-13 | 1966-12-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES344523A1 true ES344523A1 (es) | 1968-10-01 |
Family
ID=24407637
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES344523A Expired ES344523A1 (es) | 1966-12-13 | 1967-08-28 | Un metodo de fabricar un dispositivo semiconductor. |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3437533A (es) |
| DE (1) | DE1614385B1 (es) |
| ES (1) | ES344523A1 (es) |
| GB (1) | GB1177759A (es) |
| SE (1) | SE317746B (es) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3532574A (en) * | 1966-06-22 | 1970-10-06 | Compac Corp | Method for the application of friable,pressure sensitive adhesive coated laminates |
| DE1614435B2 (de) * | 1967-02-23 | 1979-05-23 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Herstellen von aus Germanium bestehenden, doppeldiffundierten Halbleiteranordnungen |
| USRE28653E (en) * | 1968-04-23 | 1975-12-16 | Method of fabricating semiconductor devices | |
| US3923562A (en) * | 1968-10-07 | 1975-12-02 | Ibm | Process for producing monolithic circuits |
| DE1812059A1 (de) * | 1968-12-02 | 1971-06-09 | Telefunken Patent | Verfahren zum Herstellen einer Halbleiteranordnung |
| US3879230A (en) * | 1970-02-07 | 1975-04-22 | Tokyo Shibaura Electric Co | Semiconductor device diffusion source containing as impurities AS and P or B |
| JPS495668B1 (es) * | 1970-04-03 | 1974-02-08 | ||
| DE2032838A1 (de) * | 1970-07-02 | 1972-01-13 | Licentia Gmbh | Verfahren zum Herstellen einer Halb leiterzone durch Diffusion |
| US3728784A (en) * | 1971-04-15 | 1973-04-24 | Monsanto Co | Fabrication of semiconductor devices |
| US3728785A (en) * | 1971-04-15 | 1973-04-24 | Monsanto Co | Fabrication of semiconductor devices |
| US3798083A (en) * | 1971-04-15 | 1974-03-19 | Monsanto Co | Fabrication of semiconductor devices |
| US3971860A (en) * | 1973-05-07 | 1976-07-27 | International Business Machines Corporation | Method for making device for high resolution electron beam fabrication |
| US4102715A (en) * | 1975-12-19 | 1978-07-25 | Matsushita Electric Industrial Co., Ltd. | Method for diffusing an impurity into a semiconductor body |
| US4029528A (en) * | 1976-08-30 | 1977-06-14 | Rca Corporation | Method of selectively doping a semiconductor body |
| US4213807A (en) * | 1979-04-20 | 1980-07-22 | Rca Corporation | Method of fabricating semiconductor devices |
| CN119767834A (zh) * | 2024-11-28 | 2025-04-04 | 天合光能股份有限公司 | 太阳能电池及其制备方法、光伏组件 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2804405A (en) * | 1954-12-24 | 1957-08-27 | Bell Telephone Labor Inc | Manufacture of silicon devices |
| NL135006C (es) * | 1958-12-24 | |||
| GB1053406A (es) * | 1963-05-18 |
-
1966
- 1966-12-13 US US601479A patent/US3437533A/en not_active Expired - Lifetime
-
1967
- 1967-08-14 GB GB37331/67A patent/GB1177759A/en not_active Expired
- 1967-08-28 ES ES344523A patent/ES344523A1/es not_active Expired
- 1967-09-07 SE SE12372/67A patent/SE317746B/xx unknown
- 1967-09-12 DE DE1967R0046891 patent/DE1614385B1/de active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| SE317746B (es) | 1969-11-24 |
| DE1614385B1 (de) | 1971-12-30 |
| GB1177759A (en) | 1970-01-14 |
| US3437533A (en) | 1969-04-08 |
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