ES349367A1 - A SEMICONDUCTIVE DEVICE AND A CIRCUIT ARRANGEMENT THAT INCORPORATES IT. - Google Patents
A SEMICONDUCTIVE DEVICE AND A CIRCUIT ARRANGEMENT THAT INCORPORATES IT.Info
- Publication number
- ES349367A1 ES349367A1 ES349367A ES349367A ES349367A1 ES 349367 A1 ES349367 A1 ES 349367A1 ES 349367 A ES349367 A ES 349367A ES 349367 A ES349367 A ES 349367A ES 349367 A1 ES349367 A1 ES 349367A1
- Authority
- ES
- Spain
- Prior art keywords
- zone
- highly doped
- diffused
- junction
- oxide layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/031—Manufacture or treatment of isolation regions comprising PN junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/30—Isolation regions comprising PN junctions
Landscapes
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Abstract
A semi-conductor device such as an integrated circuit comprises a semi-conductor body having a portion 1 of one conductivity type and one or more islands 2 of the opposite type adjoining one surface of the body and forming electrically separating PN junctions 3 with the portion, at least one semi-conductor circuit element (e.g. transistor, diode, resistor, capacitor or multi-layer structure) incorporating a zone 5 of the one conductivity type being formed in at least one island and the breakdown voltage of the junction 3 being lower than the breakdown voltage between the zone 5 and the island. The breakdown voltage of the junction 3 is determined by a local, more highly doped, zone of the portion 1, preferably in the form of a separation channel 7, and a local, more highly doped, buried zone 8 of the island, the more highly doped zones being separated by, and defining part of, the PN junction 3 and the impurity concentration characteristic of the one conductivity type in the zone 7 having a maximum adjacent the part of the junction defined by the zones 7 and 8. In one method of making the device, arsenic is vapour-deposited on one surface of a silicon wafer 1 and diffused into the wafer in an oxygen atmosphere to form the highly doped zone 8 and an oxide layer (9, Figs. 3-7, not shown). A channel (10) enclosing the island 2 is etched in the oxide layer, the exposed silicon is etched to a depth of a few tenths of a micron, and boron is vapour-deposited to form a highly doped region (11) which is then diffused through the zone 8 to reach the portion 1. This is possible because boron diffuses about ten times as fast as arsenic. The oxide layer is then removed, an epitaxial layer 4 is grown on the surface, and a further oxide layer 12 is formed on the layer 4 and provided with a channel (13) immediately above the region (11). Boron is vapour deposited in the channel (13) and diffused into the layer 4 to meet the region (11) to form the highly doped separating channel 7, and simultaneously with this diffusion, or subsequently, boron is diffused through a suitable opening in the oxide layer to form the base zone 5 of a transistor. Phosphorus is then diffused-in to form the emitter zone 6 and collector contact zone 28 and finally aluminium is deposited to form contacts 18-20. The circuit is connected to voltage sources V 1 , V 2 in such a way that the voltage difference V 1 between the portion 1 and the base zone 5 is smaller than the difference between the breakdown voltages defined above. When the voltage V 2 is increased the junction 3 breaks down before the breakdown voltage between the base zone 5 and the collector zone 4 is reached so that damage to the transistor is prevented.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL6700755A NL6700755A (en) | 1967-01-18 | 1967-01-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES349367A1 true ES349367A1 (en) | 1969-09-16 |
Family
ID=19799016
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES349367A Expired ES349367A1 (en) | 1967-01-18 | 1968-01-16 | A SEMICONDUCTIVE DEVICE AND A CIRCUIT ARRANGEMENT THAT INCORPORATES IT. |
Country Status (11)
| Country | Link |
|---|---|
| AT (1) | AT300037B (en) |
| BE (1) | BE709451A (en) |
| CH (1) | CH470764A (en) |
| DE (1) | DE1639342B2 (en) |
| DK (1) | DK119667B (en) |
| ES (1) | ES349367A1 (en) |
| FR (1) | FR1562929A (en) |
| GB (1) | GB1218603A (en) |
| NL (1) | NL6700755A (en) |
| NO (1) | NO124401B (en) |
| SE (1) | SE345555B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2174540B (en) * | 1985-05-02 | 1989-02-15 | Texas Instruments Ltd | Intergrated circuits |
| KR0171128B1 (en) * | 1995-04-21 | 1999-02-01 | 김우중 | Vertical Bipolar Transistors |
-
1967
- 1967-01-18 NL NL6700755A patent/NL6700755A/xx unknown
- 1967-12-20 DK DK640567AA patent/DK119667B/en unknown
-
1968
- 1968-01-13 DE DE1968N0031956 patent/DE1639342B2/en active Granted
- 1968-01-15 NO NO0171/68A patent/NO124401B/no unknown
- 1968-01-15 CH CH56268A patent/CH470764A/en not_active IP Right Cessation
- 1968-01-15 GB GB2135/68A patent/GB1218603A/en not_active Expired
- 1968-01-15 SE SE481/68A patent/SE345555B/xx unknown
- 1968-01-15 AT AT38268A patent/AT300037B/en not_active IP Right Cessation
- 1968-01-16 BE BE709451D patent/BE709451A/xx unknown
- 1968-01-16 ES ES349367A patent/ES349367A1/en not_active Expired
- 1968-01-17 FR FR1562929D patent/FR1562929A/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| AT300037B (en) | 1972-07-10 |
| DE1639342A1 (en) | 1971-02-04 |
| CH470764A (en) | 1969-03-31 |
| NO124401B (en) | 1972-04-10 |
| NL6700755A (en) | 1968-07-19 |
| DE1639342B2 (en) | 1977-06-02 |
| BE709451A (en) | 1968-07-16 |
| SE345555B (en) | 1972-05-29 |
| DK119667B (en) | 1971-02-08 |
| GB1218603A (en) | 1971-01-06 |
| FR1562929A (en) | 1969-04-11 |
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| ES349367A1 (en) | A SEMICONDUCTIVE DEVICE AND A CIRCUIT ARRANGEMENT THAT INCORPORATES IT. |