ES416396A1 - Un circuito para la generacion de frecuencia. - Google Patents

Un circuito para la generacion de frecuencia.

Info

Publication number
ES416396A1
ES416396A1 ES416396A ES416396A ES416396A1 ES 416396 A1 ES416396 A1 ES 416396A1 ES 416396 A ES416396 A ES 416396A ES 416396 A ES416396 A ES 416396A ES 416396 A1 ES416396 A1 ES 416396A1
Authority
ES
Spain
Prior art keywords
frequency
output
input
phase
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES416396A
Other languages
English (en)
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES416396A1 publication Critical patent/ES416396A1/es
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
ES416396A 1972-06-30 1973-06-28 Un circuito para la generacion de frecuencia. Expired ES416396A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH983172A CH553511A (de) 1972-06-30 1972-06-30 Schaltungsanordnung zur schwingungserzeugung.

Publications (1)

Publication Number Publication Date
ES416396A1 true ES416396A1 (es) 1976-02-16

Family

ID=4356116

Family Applications (1)

Application Number Title Priority Date Filing Date
ES416396A Expired ES416396A1 (es) 1972-06-30 1973-06-28 Un circuito para la generacion de frecuencia.

Country Status (5)

Country Link
AU (1) AU471941B2 (fr)
BE (1) BE801779A (fr)
CH (1) CH553511A (fr)
ES (1) ES416396A1 (fr)
GB (1) GB1373480A (fr)

Also Published As

Publication number Publication date
BE801779A (fr) 1974-01-02
AU5696873A (en) 1974-12-19
CH553511A (de) 1974-08-30
GB1373480A (en) 1974-11-13
AU471941B2 (en) 1976-05-06

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