ES458213A1 - Perfeccionamientos en mecanismos convertidores de direccio- nes en aparatos de procesos de datos. - Google Patents

Perfeccionamientos en mecanismos convertidores de direccio- nes en aparatos de procesos de datos.

Info

Publication number
ES458213A1
ES458213A1 ES77458213A ES458213A ES458213A1 ES 458213 A1 ES458213 A1 ES 458213A1 ES 77458213 A ES77458213 A ES 77458213A ES 458213 A ES458213 A ES 458213A ES 458213 A1 ES458213 A1 ES 458213A1
Authority
ES
Spain
Prior art keywords
address
logical
physical
data processing
processing devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES77458213A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of ES458213A1 publication Critical patent/ES458213A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Computer And Data Communications (AREA)
  • Bus Control (AREA)

Abstract

Perfeccionamientos en mecanismos convertidores de direcciones en aparatos de proceso de datos, para convertir una información de dirección lógica en una información de dirección física y, por el contrario, para convertir la información de dirección física en información de dirección lógica.
ES77458213A 1976-04-27 1977-04-27 Perfeccionamientos en mecanismos convertidores de direccio- nes en aparatos de procesos de datos. Expired ES458213A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4825976A JPS52130532A (en) 1976-04-27 1976-04-27 Address conversion system

Publications (1)

Publication Number Publication Date
ES458213A1 true ES458213A1 (es) 1978-02-16

Family

ID=12798433

Family Applications (1)

Application Number Title Priority Date Filing Date
ES77458213A Expired ES458213A1 (es) 1976-04-27 1977-04-27 Perfeccionamientos en mecanismos convertidores de direccio- nes en aparatos de procesos de datos.

Country Status (9)

Country Link
US (1) US4188662A (es)
JP (1) JPS52130532A (es)
AU (1) AU506271B2 (es)
BR (1) BR7702671A (es)
CA (1) CA1083727A (es)
DE (1) DE2718551C3 (es)
ES (1) ES458213A1 (es)
FR (1) FR2349885A1 (es)
GB (1) GB1555054A (es)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5454536A (en) * 1977-10-08 1979-04-28 Fujitsu Ltd Data processor
JPS5473531A (en) * 1977-11-24 1979-06-12 Hitachi Ltd Unit selecting equipment
FR2472231B1 (fr) * 1979-12-20 1986-02-21 Cii Honeywell Bull Dispositif d'adressage d'elements d'informations dans une table a plusieurs entrees, enregistree dans une memoire
JPS5734251A (en) * 1980-08-07 1982-02-24 Toshiba Corp Address conversion and generating system
JPS5843024A (ja) * 1981-09-08 1983-03-12 Hitachi Ltd チヤネル・アドレツシング方式
JPS59112325A (ja) * 1982-12-20 1984-06-28 Hitachi Ltd 電子計算機システム
JPH06105435B2 (ja) * 1985-10-25 1994-12-21 株式会社日立製作所 情報処理装置による記憶管理機構
JPS63318643A (ja) * 1987-06-22 1988-12-27 Yokogawa Hewlett Packard Ltd アドレス表示方式
US7190617B1 (en) * 1989-04-13 2007-03-13 Sandisk Corporation Flash EEprom system
EP0935255A2 (en) * 1989-04-13 1999-08-11 SanDisk Corporation Flash EEPROM system
US7447069B1 (en) 1989-04-13 2008-11-04 Sandisk Corporation Flash EEprom system
US5245594A (en) * 1989-05-17 1993-09-14 Fuji Electric Co., Ltd. Data read/write system for a disc storage unit
JPH04310157A (ja) * 1991-04-09 1992-11-02 Chubu Nippon Denki Software Kk 分散処理システムのメッセージ中継方式
US5341485A (en) * 1991-05-07 1994-08-23 International Business Machines Corporation Multiple virtual address translation per computer cycle
US6003041A (en) * 1998-01-05 1999-12-14 Gateway 2000, Inc. Method and managing multiple channel maps from multiple input devices in a multimedia system
US20100058025A1 (en) * 2008-08-26 2010-03-04 Kimmo Kuusilinna Method, apparatus and software product for distributed address-channel calculator for multi-channel memory
CN113612671B (zh) * 2021-08-02 2022-09-06 上海同星智能科技有限公司 总线适配器与通道绑定配置方法、映射管理器及连接系统

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3725864A (en) * 1971-03-03 1973-04-03 Ibm Input/output control
US3786427A (en) * 1971-06-29 1974-01-15 Ibm Dynamic address translation reversed
US3693165A (en) * 1971-06-29 1972-09-19 Ibm Parallel addressing of a storage hierarchy in a data processing system using virtual addressing
US3761881A (en) * 1971-06-30 1973-09-25 Ibm Translation storage scheme for virtual memory system
US3723976A (en) * 1972-01-20 1973-03-27 Ibm Memory system with logical and real addressing
US3781808A (en) * 1972-10-17 1973-12-25 Ibm Virtual memory system
US3839706A (en) * 1973-07-02 1974-10-01 Ibm Input/output channel relocation storage protect mechanism
FR130806A (es) * 1973-11-21
US3949380A (en) * 1974-04-22 1976-04-06 Honeywell Information Systems, Inc. Peripheral device reassignment control technique

Also Published As

Publication number Publication date
JPS566018B2 (es) 1981-02-09
FR2349885B1 (es) 1980-09-05
FR2349885A1 (fr) 1977-11-25
JPS52130532A (en) 1977-11-01
CA1083727A (en) 1980-08-12
BR7702671A (pt) 1978-02-21
AU2450977A (en) 1978-10-26
AU506271B2 (en) 1979-12-20
DE2718551B2 (es) 1980-09-04
US4188662A (en) 1980-02-12
GB1555054A (en) 1979-11-07
DE2718551C3 (de) 1981-06-19
DE2718551A1 (de) 1977-11-10

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