ES489315A1 - Procedimiento y dispositivo para la multiplicacion de sali- das de un control de programa - Google Patents
Procedimiento y dispositivo para la multiplicacion de sali- das de un control de programaInfo
- Publication number
- ES489315A1 ES489315A1 ES489315A ES489315A ES489315A1 ES 489315 A1 ES489315 A1 ES 489315A1 ES 489315 A ES489315 A ES 489315A ES 489315 A ES489315 A ES 489315A ES 489315 A1 ES489315 A1 ES 489315A1
- Authority
- ES
- Spain
- Prior art keywords
- outputs
- multiply
- exits
- programmable controller
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Program-control systems
- G05B19/02—Program-control systems electric
- G05B19/04—Program control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
- G05B19/054—Input/output
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/11—Plc I-O input output
- G05B2219/1125—I-O addressing
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Programmable Controllers (AREA)
- Selective Calling Equipment (AREA)
- Control By Computers (AREA)
Abstract
Procedimiento y dispositivo para la multiplicación de las salida de un control de programa, en el que pueden transformarse por ejemplo señales lógicas en señales lógicas o en señales de potencia, estando previstas salida para la generación de las señales lógicas o de potencia, caracterizado el procedimiento porque las salida de la unidad de programa (control programable) constituye una palabra-dato que está compuesta respectivamente por el bit para la liberación un bit para los datos y varios bits para las direcciones, porque el ib para la liberación y los bits para las direcciones se alimentan a un decodificador de direcciones, que genera una señal de control para una salida determinada a partir de los bits para las direcciones en dependencia del bit de liberación y porque el bit para los datos conecta o desconecta esta salida.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19792909212 DE2909212A1 (de) | 1979-03-09 | 1979-03-09 | Verfahren und vorrichtung zur vervielfaeltigung der ausgaenge einer programmierbaren steuerung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES489315A1 true ES489315A1 (es) | 1980-09-01 |
Family
ID=6064898
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES489315A Expired ES489315A1 (es) | 1979-03-09 | 1980-03-07 | Procedimiento y dispositivo para la multiplicacion de sali- das de un control de programa |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP0016868A3 (es) |
| JP (1) | JPS55124808A (es) |
| BR (1) | BR8001367A (es) |
| DE (1) | DE2909212A1 (es) |
| ES (1) | ES489315A1 (es) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| UST843614I4 (es) * | 1969-07-22 | |||
| US3810118A (en) * | 1971-04-27 | 1974-05-07 | Allen Bradley Co | Programmable matrix controller |
| DE2711892A1 (de) * | 1977-03-18 | 1978-09-21 | Licentia Gmbh | Schaltungsanordnung zur steuerung des datenverkehrs zwischen einem mikroprozessor und peripherieeinheiten |
-
1979
- 1979-03-09 DE DE19792909212 patent/DE2909212A1/de not_active Ceased
- 1979-12-22 EP EP79105353A patent/EP0016868A3/de not_active Withdrawn
-
1980
- 1980-03-07 ES ES489315A patent/ES489315A1/es not_active Expired
- 1980-03-07 BR BR8001367A patent/BR8001367A/pt unknown
- 1980-03-10 JP JP3020880A patent/JPS55124808A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| BR8001367A (pt) | 1980-11-11 |
| EP0016868A2 (de) | 1980-10-15 |
| DE2909212A1 (de) | 1980-09-11 |
| EP0016868A3 (de) | 1981-04-29 |
| JPS55124808A (en) | 1980-09-26 |
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