ES556088A0 - Un mecanismo de gestion de datos en un sistema de procesadores - Google Patents

Un mecanismo de gestion de datos en un sistema de procesadores

Info

Publication number
ES556088A0
ES556088A0 ES556088A ES556088A ES556088A0 ES 556088 A0 ES556088 A0 ES 556088A0 ES 556088 A ES556088 A ES 556088A ES 556088 A ES556088 A ES 556088A ES 556088 A0 ES556088 A0 ES 556088A0
Authority
ES
Spain
Prior art keywords
data management
processor system
management mechanism
processor
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES556088A
Other languages
English (en)
Other versions
ES8801739A1 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES8801739A1 publication Critical patent/ES8801739A1/es
Publication of ES556088A0 publication Critical patent/ES556088A0/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Computer And Data Communications (AREA)
  • Multi Processors (AREA)
ES556088A 1985-06-17 1986-06-16 Un mecanismo de gestion de datos en un sistema de procesadores Expired ES8801739A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US74554585A 1985-06-17 1985-06-17

Publications (2)

Publication Number Publication Date
ES8801739A1 ES8801739A1 (es) 1988-02-16
ES556088A0 true ES556088A0 (es) 1988-02-16

Family

ID=24997141

Family Applications (1)

Application Number Title Priority Date Filing Date
ES556088A Expired ES8801739A1 (es) 1985-06-17 1986-06-16 Un mecanismo de gestion de datos en un sistema de procesadores

Country Status (5)

Country Link
EP (1) EP0205948B1 (es)
JP (1) JP2534229B2 (es)
CA (1) CA1244142A (es)
DE (1) DE3689991T2 (es)
ES (1) ES8801739A1 (es)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0776939B2 (ja) * 1988-03-16 1995-08-16 富士ゼロックス株式会社 通信ネットワークシステム
FR2631185B1 (fr) * 1988-05-06 1992-07-31 Sabourin Herve Reseau local de communications a acces multiples et a regulation de trafic distribuee
WO1989011192A1 (fr) * 1988-05-06 1989-11-16 Sabourin Herve Jean Francois Reseau local de communications a acces multiples par regulation distribuee de trafic
US5124909A (en) * 1988-10-31 1992-06-23 Hewlett-Packard Company Software program for providing cooperative processing between personal computers and a host computer
EP0454851A4 (en) * 1989-09-14 1993-06-09 Fujitsu Limited Network control system
US5606666A (en) * 1994-07-19 1997-02-25 International Business Machines Corporation Method and apparatus for distributing control messages between interconnected processing elements by mapping control messages of a shared memory addressable by the receiving processing element
WO1998035479A1 (en) * 1997-02-06 1998-08-13 Unisys Corporation Method, system, and computer program product for data communication using an intraconnect architecture
US6345296B1 (en) 1997-07-02 2002-02-05 Unisys Corporation Method system and computer program product for providing pull model data communication
US6088729A (en) * 1997-07-02 2000-07-11 Unisys Corporation Method, system, and computer program product for establishing dialogs in an intraconnect data communication
US6064805A (en) * 1997-07-02 2000-05-16 Unisys Corporation Method, system, and computer program product for intraconnect data communication using buffer pools and buffer pool management
SE518492C2 (sv) * 1998-11-24 2002-10-15 Ericsson Telefon Ab L M System och förfarande för överföring av lokalt lagrad information i ett datorkomplex
JP4062441B2 (ja) 2003-07-18 2008-03-19 日本電気株式会社 並列処理システム及び並列処理プログラム

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR111576A (es) * 1973-12-13 1900-01-01
JPS51102533A (ja) * 1975-03-07 1976-09-10 Hitachi Ltd Fukusushorisochikannotsushinseigyosochi
JPS5463644A (en) * 1977-10-31 1979-05-22 Toshiba Corp Multiprocessing system
GB8309770D0 (en) * 1983-04-11 1983-05-18 Inmos Ltd Microcomputer
JPS59220866A (ja) * 1983-05-30 1984-12-12 Hitachi Ltd 分散処理方式
US4564901A (en) * 1983-07-21 1986-01-14 Burroughs Corporation Method of performing a sequence of related activities via multiple asynchronously intercoupled digital processors
JPS6077259A (ja) * 1983-10-05 1985-05-01 Fujitsu Ltd 負荷分散方式
AU589400B2 (en) * 1985-03-05 1989-10-12 Wang Laboratories, Inc. Apparatus and method for control of one computer system by another computer system

Also Published As

Publication number Publication date
ES8801739A1 (es) 1988-02-16
DE3689991T2 (de) 1995-03-09
DE3689991D1 (de) 1994-09-01
EP0205948B1 (en) 1994-07-27
EP0205948A2 (en) 1986-12-30
JP2534229B2 (ja) 1996-09-11
JPS61289457A (ja) 1986-12-19
EP0205948A3 (en) 1989-06-07
CA1244142A (en) 1988-11-01

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 20010402