FI105376B - Tahdistusmenetelmä SDH-järjestelmille sekä menetelmä ja kytkentäjärjestely erilaisten tietorakenteiden tunnistamiseksi - Google Patents

Tahdistusmenetelmä SDH-järjestelmille sekä menetelmä ja kytkentäjärjestely erilaisten tietorakenteiden tunnistamiseksi Download PDF

Info

Publication number
FI105376B
FI105376B FI911921A FI911921A FI105376B FI 105376 B FI105376 B FI 105376B FI 911921 A FI911921 A FI 911921A FI 911921 A FI911921 A FI 911921A FI 105376 B FI105376 B FI 105376B
Authority
FI
Finland
Prior art keywords
frame
cell
mode
synchronization
sync
Prior art date
Application number
FI911921A
Other languages
English (en)
Finnish (fi)
Swedish (sv)
Other versions
FI911921A7 (fi
FI911921A0 (fi
Inventor
Karl-Albert Turban
Lothar Krank
Original Assignee
Alcatel Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19904012762 external-priority patent/DE4012762A1/de
Priority claimed from DE19904015283 external-priority patent/DE4015283A1/de
Application filed by Alcatel Nv filed Critical Alcatel Nv
Publication of FI911921A0 publication Critical patent/FI911921A0/fi
Publication of FI911921A7 publication Critical patent/FI911921A7/fi
Application granted granted Critical
Publication of FI105376B publication Critical patent/FI105376B/fi

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H04J3/0608—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Communication Control (AREA)
  • Eye Examination Apparatus (AREA)
  • Electrically Operated Instructional Devices (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Inspection Of Paper Currency And Valuable Securities (AREA)
  • Semiconductor Memories (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
FI911921A 1990-04-21 1991-04-19 Tahdistusmenetelmä SDH-järjestelmille sekä menetelmä ja kytkentäjärjestely erilaisten tietorakenteiden tunnistamiseksi FI105376B (fi)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE19904012762 DE4012762A1 (de) 1990-04-21 1990-04-21 Verfahren zur synchronisation eines nach einer digitalen synchronen hierarchie rahmenstrukturierten systemes
DE4012762 1990-04-21
DE4015283 1990-05-12
DE19904015283 DE4015283A1 (de) 1990-05-12 1990-05-12 Verfahren und schaltungsanordnung zum erkennen unterschiedlicher datenstrukturen fuer asynchrone transport module uebertragende systeme

Publications (3)

Publication Number Publication Date
FI911921A0 FI911921A0 (fi) 1991-04-19
FI911921A7 FI911921A7 (fi) 1991-10-22
FI105376B true FI105376B (fi) 2000-07-31

Family

ID=25892422

Family Applications (1)

Application Number Title Priority Date Filing Date
FI911921A FI105376B (fi) 1990-04-21 1991-04-19 Tahdistusmenetelmä SDH-järjestelmille sekä menetelmä ja kytkentäjärjestely erilaisten tietorakenteiden tunnistamiseksi

Country Status (9)

Country Link
US (1) US5251239A (fr)
EP (1) EP0453876B1 (fr)
JP (1) JP3205351B2 (fr)
AT (1) ATE154483T1 (fr)
AU (2) AU642235B2 (fr)
CA (1) CA2040085C (fr)
DE (1) DE59108745D1 (fr)
ES (1) ES2104629T3 (fr)
FI (1) FI105376B (fr)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2266979A (en) * 1992-05-12 1993-11-17 Apple Computer Phase register for synchronization of multiple signal processors.
JP3306938B2 (ja) * 1992-11-25 2002-07-24 ソニー株式会社 同期符号抽出回路
FI93289C (fi) * 1993-03-16 1995-03-10 Nokia Telecommunications Oy Menetelmä ehdollisten kytkentöjen ohjaamiseksi synkronisessa digitaalisessa tietoliikennejärjestelmässä
FI93287C (fi) * 1993-03-16 1995-03-10 Nokia Telecommunications Oy Menetelmä toisiinsa kytkettyjen SDH- ja PDH-tietoliikenneverkkojen synkronoimiseksi
FI93288C (fi) * 1993-03-16 1995-03-10 Nokia Telecommunications Oy Menetelmä ehdollisten kytkentöjen ohjaamiseksi tietoliikennejärjestelmässä
FR2709899B1 (fr) * 1993-09-07 1995-11-10 Sagem Procédé de détection d'une perte de synchronisation dans un réseau numérique de communication et terminal pour la mise en Óoeuvre du procédé.
US5646947A (en) * 1995-03-27 1997-07-08 Westinghouse Electric Corporation Mobile telephone single channel per carrier superframe lock subsystem
US5963564A (en) * 1995-06-13 1999-10-05 Telefonaktiebolaget Lm Ericsson Synchronizing the transmission of data via a two-way link
US6452927B1 (en) 1995-12-29 2002-09-17 Cypress Semiconductor Corporation Method and apparatus for providing a serial interface between an asynchronous transfer mode (ATM) layer and a physical (PHY) layer
US5684727A (en) * 1996-02-07 1997-11-04 Macdonald, Dettwiler And Associates Ltd. High-speed correlator
DE19653261A1 (de) 1996-12-20 1998-06-25 Alsthom Cge Alcatel Synchrones digitales Nachrichtenübertragungssystem, Steuerungseinrichtung, Netzelement und zentraler Taktgenerator
GB9718831D0 (en) * 1997-09-05 1997-11-12 Plessey Telecomm Data transmission in an sdh network
DE19740107A1 (de) 1997-09-12 1999-03-18 Alsthom Cge Alcatel Verfahren zum Übertragen von Datenpaketen und zur Durchführung des Verfahrens geeignetes Netzelement
DE19740106A1 (de) 1997-09-12 1999-03-18 Alsthom Cge Alcatel Verfahren zum Einrichten von logischen Verbindungen in einem synchronen digitalen Nachrichtenübertragungsnetz, Netzelement und Managementsystem
DE19813168A1 (de) * 1998-03-25 1999-09-30 Siemens Ag Verfahren zur Datenübertragung, Codierer sowie Decodierer
JP3411214B2 (ja) 1998-05-22 2003-05-26 三菱電機株式会社 ディジタル無線通信系の受信処理方法および受信機
US6584118B1 (en) * 1998-08-27 2003-06-24 Nortel Networks Limited Payload mapping in synchronous networks
US6381243B1 (en) * 1998-09-18 2002-04-30 Telefonaktiebolaget Lm Ericsson (Publ) Determining time slot delay for ATM transmission
JP2000324116A (ja) * 1999-05-06 2000-11-24 Nec Ic Microcomput Syst Ltd フレーム同期方法およびフレーム同期回路
EP1077562A1 (fr) * 1999-08-17 2001-02-21 Siemens Aktiengesellschaft Procédé de synchronisation de pacquets à longueur variable dans un canal structuré en bit
US20020159483A1 (en) * 2001-04-26 2002-10-31 International Business Machines Corporation SDH/SONET frame byte alignment unit
JP2012094975A (ja) * 2010-10-25 2012-05-17 Fujitsu Telecom Networks Ltd 光パケットスイッチ装置
US9479275B2 (en) 2012-06-01 2016-10-25 Blackberry Limited Multiformat digital audio interface
US9252900B2 (en) 2012-06-01 2016-02-02 Blackberry Limited Universal synchronization engine based on probabilistic methods for guarantee of lock in multiformat audio systems

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2351478C3 (de) * 1973-10-13 1981-10-01 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur Synchronisation des Zeitrahmens im Empfänger eines Zeitmultiplex-Übertragungssystems auf den Zeitrahmen des Senders
DE3735377A1 (de) * 1987-10-19 1989-04-27 Siemens Ag Verfahren zur synchronisation eines zeitmultiplexsystems fuer eine uebertragung von paketen einheitlicher laenge
JP2531272B2 (ja) * 1988-08-11 1996-09-04 日本電気株式会社 フレ―ム同期制御方式
DE3833184A1 (de) * 1988-09-30 1990-04-05 Standard Elektrik Lorenz Ag Verfahren und schaltungsanordnung zur herstellung einer rahmensynchronisation in einem zeitmultiplexsystem
KR910005493B1 (ko) * 1988-12-14 1991-07-31 한국전기통신공사 동기식 다중화 장치의 리프레임 회로
GB8910255D0 (en) * 1989-05-04 1989-06-21 Stc Plc Data stream frame synchronisation

Also Published As

Publication number Publication date
CA2040085A1 (fr) 1991-10-22
FI911921A7 (fi) 1991-10-22
ES2104629T3 (es) 1997-10-16
DE59108745D1 (de) 1997-07-17
FI911921A0 (fi) 1991-04-19
JPH04229743A (ja) 1992-08-19
JP3205351B2 (ja) 2001-09-04
EP0453876A2 (fr) 1991-10-30
AU647336B2 (en) 1994-03-17
AU7503691A (en) 1991-10-24
CA2040085C (fr) 1997-02-11
AU4450793A (en) 1993-10-21
AU642235B2 (en) 1993-10-14
ATE154483T1 (de) 1997-06-15
EP0453876A3 (en) 1992-10-14
EP0453876B1 (fr) 1997-06-11
US5251239A (en) 1993-10-05

Similar Documents

Publication Publication Date Title
AU647336B2 (en) Means for identifying data structures
US5384774A (en) Asynchronous transfer mode (ATM) payload synchronizer
EP0969673B1 (fr) Détection d'erreurs dans la réception de signaux multiplexés
JPH0198336A (ja) デジタル通信方法及び装置
JPWO1998036519A1 (ja) フレーム同期回路
US7209493B2 (en) Multiplex transmission system and multiplex transmitter
US7804853B2 (en) Communications system
Munhoz et al. On frame synchronization of PCM systems
US6876671B1 (en) Method for transmitting variable sized packets from an upper layer of a stack of communication protocol layers to a lower layer intended to manage fixed sized packets
US6438175B1 (en) Data transmission method and apparatus
US6400732B1 (en) Method and apparatus for transmitting data in a high-speed, multiplexed data communication system
WO2000072526A1 (fr) Procede et dispositif permettant d'ameliorer le traitement d'identificateurs tti
GB2276296A (en) Checking synchronization in a communication network
US20020159483A1 (en) SDH/SONET frame byte alignment unit
JPH09214458A (ja) 無線中継装置
CA2368878A1 (fr) Systeme d'acces a un reseau synchrone comprenant un equipement et un equipement recepteur
JP4239668B2 (ja) データメモリ制御方式
JP3181205B2 (ja) Ｓｄｈインタフェース送信回路及びｓｄｈインタフェース受信回路
KR19980020862A (ko) 비동기 전송모드(atm) 셀 기반 전송방식의 프레임 동기장치
KR100289574B1 (ko) 동기식 전송장치에서 ds-３ 신호와 관리단위신호 사이의 다중화 및 역다중화장치
KR19990075717A (ko) 비동기 전송 모드 망에서의 프레임 동기 검출방법
JP2586339B2 (ja) 受信ポインタ処理装置および方法
Uematsu et al. A Universal Structure for SDH Multiplex Line Terminals with a Unique CMOS LSI for SOH Processing
JP2962472B2 (ja) フレーム位相変換回路、クロスコネクト装置および受信装置
KR100901774B1 (ko) 동기식통신망용 전송장치 및 전송방법

Legal Events

Date Code Title Description
MA Patent expired