FR1456952A - Dispositif semiconducteur et son procédé de fabrication - Google Patents

Dispositif semiconducteur et son procédé de fabrication

Info

Publication number
FR1456952A
FR1456952A FR32346A FR32346A FR1456952A FR 1456952 A FR1456952 A FR 1456952A FR 32346 A FR32346 A FR 32346A FR 32346 A FR32346 A FR 32346A FR 1456952 A FR1456952 A FR 1456952A
Authority
FR
France
Prior art keywords
semiconductor device
manufacturing process
manufacturing
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR32346A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of FR1456952A publication Critical patent/FR1456952A/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/137Collector regions of BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/69Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00Grinding, lapping or polishing of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W15/00Highly-doped buried regions of integrated devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W15/00Highly-doped buried regions of integrated devices
    • H10W15/01Manufacture or treatment
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/037Diffusion-deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/049Equivalence and options
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
FR32346A 1964-09-23 1965-09-23 Dispositif semiconducteur et son procédé de fabrication Expired FR1456952A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL646411057A NL144775B (nl) 1964-09-23 1964-09-23 Halfgeleiderinrichting met meer dan een halfgeleiderschakelelement in een lichaam.

Publications (1)

Publication Number Publication Date
FR1456952A true FR1456952A (fr) 1966-07-08

Family

ID=19791081

Family Applications (1)

Application Number Title Priority Date Filing Date
FR32346A Expired FR1456952A (fr) 1964-09-23 1965-09-23 Dispositif semiconducteur et son procédé de fabrication

Country Status (8)

Country Link
US (1) US3614558A (fr)
AT (1) AT263081B (fr)
BE (1) BE670038A (fr)
CH (1) CH436508A (fr)
FR (1) FR1456952A (fr)
GB (1) GB1124801A (fr)
NL (1) NL144775B (fr)
SE (1) SE314441B (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3800195A (en) * 1972-08-09 1974-03-26 Motorola Inc Method of making semiconductor devices through overlapping diffusions
US3865649A (en) * 1972-10-16 1975-02-11 Harris Intertype Corp Fabrication of MOS devices and complementary bipolar transistor devices in a monolithic substrate
US4261003A (en) * 1979-03-09 1981-04-07 International Business Machines Corporation Integrated circuit structures with full dielectric isolation and a novel method for fabrication thereof
US4446476A (en) * 1981-06-30 1984-05-01 International Business Machines Corporation Integrated circuit having a sublayer electrical contact and fabrication thereof
US4649630A (en) * 1985-04-01 1987-03-17 Motorola, Inc. Process for dielectrically isolated semiconductor structure
JPH0638424B2 (ja) * 1986-07-31 1994-05-18 株式会社日立製作所 半導体装置の製造方法
US4794093A (en) * 1987-05-01 1988-12-27 Raytheon Company Selective backside plating of gaas monolithic microwave integrated circuits
US4839309A (en) * 1988-03-30 1989-06-13 American Telephone And Telegraph Company, At&T Technologies, Inc. Fabrication of high-speed dielectrically isolated devices utilizing buried silicide outdiffusion
US5459346A (en) * 1988-06-28 1995-10-17 Ricoh Co., Ltd. Semiconductor substrate with electrical contact in groove
DE102004050740A1 (de) * 2004-10-19 2006-04-20 Atmel Germany Gmbh Halbleitergegenstand und Verfahren zur Herstellung
CN103137547A (zh) * 2011-11-28 2013-06-05 中国科学院上海微系统与信息技术研究所 一种绝缘体上Si/NiSi2衬底材料及其制备方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL264215A (fr) * 1960-05-02
GB948238A (en) * 1961-09-25 1964-01-29 Raytheon Co Improvements in or relating to switching circuits
BE632105A (fr) * 1962-05-09
US3323071A (en) * 1964-07-09 1967-05-30 Nat Semiconductor Corp Semiconductor circuit arrangement utilizing integrated chopper element as zener-diode-coupled transistor
US3381182A (en) * 1964-10-19 1968-04-30 Philco Ford Corp Microcircuits having buried conductive layers
US3368113A (en) * 1965-06-28 1968-02-06 Westinghouse Electric Corp Integrated circuit structures, and method of making same, including a dielectric medium for internal isolation

Also Published As

Publication number Publication date
US3614558A (en) 1971-10-19
GB1124801A (en) 1968-08-21
NL6411057A (fr) 1966-03-24
CH436508A (de) 1967-05-31
BE670038A (fr) 1966-03-23
NL144775B (nl) 1975-01-15
AT263081B (de) 1968-07-10
SE314441B (fr) 1969-09-08

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