FR1475932A - Réseau logique - Google Patents
Réseau logiqueInfo
- Publication number
- FR1475932A FR1475932A FR51013A FR51013A FR1475932A FR 1475932 A FR1475932 A FR 1475932A FR 51013 A FR51013 A FR 51013A FR 51013 A FR51013 A FR 51013A FR 1475932 A FR1475932 A FR 1475932A
- Authority
- FR
- France
- Prior art keywords
- logical network
- logical
- network
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR51013A FR1475932A (fr) | 1966-02-24 | 1966-02-24 | Réseau logique |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR51013A FR1475932A (fr) | 1966-02-24 | 1966-02-24 | Réseau logique |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| FR1475932A true FR1475932A (fr) | 1967-04-07 |
Family
ID=8602224
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR51013A Expired FR1475932A (fr) | 1966-02-24 | 1966-02-24 | Réseau logique |
Country Status (1)
| Country | Link |
|---|---|
| FR (1) | FR1475932A (fr) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0099135A3 (en) * | 1982-07-16 | 1985-10-23 | Nec Corporation | Dynamic gate array whereby an assembly of gates is simulated by logic operations on variables selected according to the gates |
-
1966
- 1966-02-24 FR FR51013A patent/FR1475932A/fr not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0099135A3 (en) * | 1982-07-16 | 1985-10-23 | Nec Corporation | Dynamic gate array whereby an assembly of gates is simulated by logic operations on variables selected according to the gates |
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