FR2377667A1 - Systeme pour bloquer la memoire d'un systeme de traitement de donnees - Google Patents

Systeme pour bloquer la memoire d'un systeme de traitement de donnees

Info

Publication number
FR2377667A1
FR2377667A1 FR7801266A FR7801266A FR2377667A1 FR 2377667 A1 FR2377667 A1 FR 2377667A1 FR 7801266 A FR7801266 A FR 7801266A FR 7801266 A FR7801266 A FR 7801266A FR 2377667 A1 FR2377667 A1 FR 2377667A1
Authority
FR
France
Prior art keywords
blocking
memory
data processing
processing system
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7801266A
Other languages
English (en)
Other versions
FR2377667B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2377667A1 publication Critical patent/FR2377667A1/fr
Application granted granted Critical
Publication of FR2377667B1 publication Critical patent/FR2377667B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)

Abstract

Système pour bloquer la mémoire d'un système de traitement de données. Le système pour bloquer la mémoire, organisée en blocs accessibles sélectivement par des dispositifs avec lesquels elle coopère, comprend un dispositif pour bloquer l'accès à un bloc sélectionné de la mémoire d'un dispositif autre qu'un dispositif déterminé, et des moyens pour engendrer des signaux de blocage de lecture et de déblocage d'inscription reliés à des moyens pour fournir une commande d'arrêt de la séquence de blocage de lecture-déblocage d'inscription d'opérations tentées par cet autre dispositif, tant que le dispositif déterminé exécute une séquence d'opérations. Application : accès sélectif d'unités centrales de traitement en données à la mémoire principale d'un système de traitement de données.
FR7801266A 1977-01-18 1978-01-17 Systeme pour bloquer la memoire d'un systeme de traitement de donnees Granted FR2377667A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/760,299 US4099243A (en) 1977-01-18 1977-01-18 Memory block protection apparatus

Publications (2)

Publication Number Publication Date
FR2377667A1 true FR2377667A1 (fr) 1978-08-11
FR2377667B1 FR2377667B1 (fr) 1983-08-12

Family

ID=25058683

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7801266A Granted FR2377667A1 (fr) 1977-01-18 1978-01-17 Systeme pour bloquer la memoire d'un systeme de traitement de donnees

Country Status (7)

Country Link
US (1) US4099243A (fr)
JP (1) JPS5837587B2 (fr)
AU (1) AU517516B2 (fr)
CA (1) CA1109970A (fr)
DE (1) DE2801518A1 (fr)
FR (1) FR2377667A1 (fr)
GB (1) GB1550794A (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4296466A (en) * 1978-01-23 1981-10-20 Data General Corporation Data processing system including a separate input/output processor with micro-interrupt request apparatus
US4393459A (en) * 1980-07-17 1983-07-12 International Business Machines Corp. Status reporting with ancillary data
US4574350A (en) * 1982-05-19 1986-03-04 At&T Bell Laboratories Shared resource locking apparatus
US4493031A (en) * 1982-08-25 1985-01-08 At&T Bell Laboratories Memory write protection using timers
US4891749A (en) * 1983-03-28 1990-01-02 International Business Machines Corporation Multiprocessor storage serialization apparatus
US4706190A (en) * 1983-09-22 1987-11-10 Digital Equipment Corporation Retry mechanism for releasing control of a communications path in digital computer system
US4561051A (en) * 1984-02-10 1985-12-24 Prime Computer, Inc. Memory access method and apparatus in multiple processor systems
DE3537115A1 (de) * 1985-10-18 1987-05-27 Standard Elektrik Lorenz Ag Verfahren zum betreiben einer einrichtung mit zwei voneinander unabhaengigen befehlseingabestellen und nach diesem verfahren arbeitende einrichtung
JPS6376034A (ja) * 1986-09-19 1988-04-06 Hitachi Ltd 多重アドレス空間制御方式
US4858116A (en) * 1987-05-01 1989-08-15 Digital Equipment Corporation Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
US4949239A (en) * 1987-05-01 1990-08-14 Digital Equipment Corporation System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system
US4937733A (en) * 1987-05-01 1990-06-26 Digital Equipment Corporation Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system
US4941083A (en) * 1987-05-01 1990-07-10 Digital Equipment Corporation Method and apparatus for initiating interlock read transactions on a multiprocessor computer system
US5341510A (en) * 1987-05-01 1994-08-23 Digital Equipment Corporation Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor
AU614044B2 (en) * 1988-03-25 1991-08-15 Nec Corporation Information processing system capable of quickly detecting an extended buffer memory regardless of a state of a main memory device
US4984153A (en) * 1988-04-27 1991-01-08 Unisys Corporation Storage locking control for a plurality of processors which share a common storage unit
US5353416A (en) * 1989-10-25 1994-10-04 Zenith Data Systems Corporation CPU lock logic for corrected operation with a posted write array
US5317749A (en) * 1992-09-25 1994-05-31 International Business Machines Corporation Method and apparatus for controlling access by a plurality of processors to a shared resource
US5666515A (en) * 1993-02-18 1997-09-09 Unisys Corporation Information processing system having multiple modules and a memory on a bus, where any module can lock an addressable portion of the memory by sending retry signals to other modules that try to read at the locked address
US5617559A (en) * 1994-08-31 1997-04-01 Motorola Inc. Modular chip select control circuit and method for performing pipelined memory accesses

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3683418A (en) * 1970-04-16 1972-08-08 Bell Telephone Labor Inc Method of protecting data in a multiprocessor computer system
FR2213537A1 (fr) * 1973-01-08 1974-08-02 Philips Nv

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3328768A (en) * 1964-04-06 1967-06-27 Ibm Storage protection systems
US3405394A (en) * 1965-12-22 1968-10-08 Ibm Controlled register accessing
US3377624A (en) * 1966-01-07 1968-04-09 Ibm Memory protection system
US3573736A (en) * 1968-01-15 1971-04-06 Ibm Interruption and interlock arrangement
US3562717A (en) * 1968-02-23 1971-02-09 Gen Electric System protection apparatus
JPS4930578B1 (fr) * 1970-09-30 1974-08-14
US3858182A (en) * 1972-10-10 1974-12-31 Digital Equipment Corp Computer program protection means
US3997875A (en) * 1973-01-08 1976-12-14 U.S. Philips Corporation Computer configuration with claim cycles
US3828327A (en) * 1973-04-30 1974-08-06 Ibm Simplified storage protection and address translation under system mode control in a data processing system
US3893084A (en) * 1973-05-01 1975-07-01 Digital Equipment Corp Memory access control system
US3845425A (en) * 1973-06-15 1974-10-29 Gte Automatic Electric Lab Inc Method and apparatus for providing conditional and unconditional access to protected memory storage locations

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3683418A (en) * 1970-04-16 1972-08-08 Bell Telephone Labor Inc Method of protecting data in a multiprocessor computer system
FR2213537A1 (fr) * 1973-01-08 1974-08-02 Philips Nv

Also Published As

Publication number Publication date
FR2377667B1 (fr) 1983-08-12
AU3221378A (en) 1979-07-12
JPS5837587B2 (ja) 1983-08-17
DE2801518A1 (de) 1978-07-20
AU517516B2 (en) 1981-08-06
CA1109970A (fr) 1981-09-29
GB1550794A (en) 1979-08-22
JPS5390829A (en) 1978-08-10
US4099243A (en) 1978-07-04

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Legal Events

Date Code Title Description
ST Notification of lapse