FR2563349B1 - Multiplieur matriciel systolique de traitement de donnees numeriques - Google Patents

Multiplieur matriciel systolique de traitement de donnees numeriques

Info

Publication number
FR2563349B1
FR2563349B1 FR8406140A FR8406140A FR2563349B1 FR 2563349 B1 FR2563349 B1 FR 2563349B1 FR 8406140 A FR8406140 A FR 8406140A FR 8406140 A FR8406140 A FR 8406140A FR 2563349 B1 FR2563349 B1 FR 2563349B1
Authority
FR
France
Prior art keywords
systolic
data processing
digital data
matrix multiplier
processing matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8406140A
Other languages
English (en)
Other versions
FR2563349A1 (fr
Inventor
Carlac H Jean-Claude
Jean-Luc Sicre
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
France Telecom R&D SA
Gouvernement de la Republique Francaise
Original Assignee
France Telecom R&D SA
Gouvernement de la Republique Francaise
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by France Telecom R&D SA, Gouvernement de la Republique Francaise filed Critical France Telecom R&D SA
Priority to FR8406140A priority Critical patent/FR2563349B1/fr
Publication of FR2563349A1 publication Critical patent/FR2563349A1/fr
Application granted granted Critical
Publication of FR2563349B1 publication Critical patent/FR2563349B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/15—Correlation function computation including computation of convolution operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Physics (AREA)
  • Algebra (AREA)
  • Software Systems (AREA)
  • Databases & Information Systems (AREA)
  • Complex Calculations (AREA)
FR8406140A 1984-04-18 1984-04-18 Multiplieur matriciel systolique de traitement de donnees numeriques Expired FR2563349B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8406140A FR2563349B1 (fr) 1984-04-18 1984-04-18 Multiplieur matriciel systolique de traitement de donnees numeriques

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8406140A FR2563349B1 (fr) 1984-04-18 1984-04-18 Multiplieur matriciel systolique de traitement de donnees numeriques

Publications (2)

Publication Number Publication Date
FR2563349A1 FR2563349A1 (fr) 1985-10-25
FR2563349B1 true FR2563349B1 (fr) 1989-04-28

Family

ID=9303277

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8406140A Expired FR2563349B1 (fr) 1984-04-18 1984-04-18 Multiplieur matriciel systolique de traitement de donnees numeriques

Country Status (1)

Country Link
FR (1) FR2563349B1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7395298B2 (en) 1995-08-31 2008-07-01 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US7424505B2 (en) 1995-08-31 2008-09-09 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US7430578B2 (en) 2001-10-29 2008-09-30 Intel Corporation Method and apparatus for performing multiply-add operations on packed byte data

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8320362D0 (en) * 1983-07-28 1983-09-01 Secr Defence Digital data processor
DE58908705D1 (de) * 1989-09-20 1995-01-12 Itt Ind Gmbh Deutsche Schaltungsanordnung zur Produktsummenberechnung.
US7395302B2 (en) 1998-03-31 2008-07-01 Intel Corporation Method and apparatus for performing horizontal addition and subtraction
US7392275B2 (en) 1998-03-31 2008-06-24 Intel Corporation Method and apparatus for performing efficient transformations with horizontal addition and subtraction

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7395298B2 (en) 1995-08-31 2008-07-01 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US7424505B2 (en) 1995-08-31 2008-09-09 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US7509367B2 (en) 1995-08-31 2009-03-24 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US8185571B2 (en) 1995-08-31 2012-05-22 Intel Corporation Processor for performing multiply-add operations on packed data
US8396915B2 (en) 1995-08-31 2013-03-12 Intel Corporation Processor for performing multiply-add operations on packed data
US8495123B2 (en) 1995-08-31 2013-07-23 Intel Corporation Processor for performing multiply-add operations on packed data
US8626814B2 (en) 1995-08-31 2014-01-07 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US8725787B2 (en) 1995-08-31 2014-05-13 Intel Corporation Processor for performing multiply-add operations on packed data
US8745119B2 (en) 1995-08-31 2014-06-03 Intel Corporation Processor for performing multiply-add operations on packed data
US8793299B2 (en) 1995-08-31 2014-07-29 Intel Corporation Processor for performing multiply-add operations on packed data
US7430578B2 (en) 2001-10-29 2008-09-30 Intel Corporation Method and apparatus for performing multiply-add operations on packed byte data

Also Published As

Publication number Publication date
FR2563349A1 (fr) 1985-10-25

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Legal Events

Date Code Title Description
ST Notification of lapse