FR2835652B1 - Procede de fabrication d'un circuit integre comportant des transistors bipolaires, en particulier a heterojonction si/sige, et des transistors a effet de champ a grilles isolees, et circuit integre correspondant - Google Patents

Procede de fabrication d'un circuit integre comportant des transistors bipolaires, en particulier a heterojonction si/sige, et des transistors a effet de champ a grilles isolees, et circuit integre correspondant

Info

Publication number
FR2835652B1
FR2835652B1 FR0201305A FR0201305A FR2835652B1 FR 2835652 B1 FR2835652 B1 FR 2835652B1 FR 0201305 A FR0201305 A FR 0201305A FR 0201305 A FR0201305 A FR 0201305A FR 2835652 B1 FR2835652 B1 FR 2835652B1
Authority
FR
France
Prior art keywords
integrated circuit
heterojunction
sige
manufacturing
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0201305A
Other languages
English (en)
Other versions
FR2835652A1 (fr
Inventor
Michel Marty
Alain Chantre
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0201305A priority Critical patent/FR2835652B1/fr
Priority to US10/352,376 priority patent/US6902970B2/en
Publication of FR2835652A1 publication Critical patent/FR2835652A1/fr
Application granted granted Critical
Publication of FR2835652B1 publication Critical patent/FR2835652B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
FR0201305A 2002-02-04 2002-02-04 Procede de fabrication d'un circuit integre comportant des transistors bipolaires, en particulier a heterojonction si/sige, et des transistors a effet de champ a grilles isolees, et circuit integre correspondant Expired - Fee Related FR2835652B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0201305A FR2835652B1 (fr) 2002-02-04 2002-02-04 Procede de fabrication d'un circuit integre comportant des transistors bipolaires, en particulier a heterojonction si/sige, et des transistors a effet de champ a grilles isolees, et circuit integre correspondant
US10/352,376 US6902970B2 (en) 2002-02-04 2003-01-27 Integrated circuit including, and fabrication method for producing, bipolar and MOSFET transistors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0201305A FR2835652B1 (fr) 2002-02-04 2002-02-04 Procede de fabrication d'un circuit integre comportant des transistors bipolaires, en particulier a heterojonction si/sige, et des transistors a effet de champ a grilles isolees, et circuit integre correspondant

Publications (2)

Publication Number Publication Date
FR2835652A1 FR2835652A1 (fr) 2003-08-08
FR2835652B1 true FR2835652B1 (fr) 2005-04-15

Family

ID=27619871

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0201305A Expired - Fee Related FR2835652B1 (fr) 2002-02-04 2002-02-04 Procede de fabrication d'un circuit integre comportant des transistors bipolaires, en particulier a heterojonction si/sige, et des transistors a effet de champ a grilles isolees, et circuit integre correspondant

Country Status (2)

Country Link
US (1) US6902970B2 (fr)
FR (1) FR2835652B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6972237B2 (en) * 2003-12-01 2005-12-06 Chartered Semiconductor Manufacturing Ltd. Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69127582T2 (de) * 1990-05-18 1998-03-26 Fujitsu Ltd Verfahren zur Herstellung eines Halbleitersubstrates und Verfahren zur Herstellung einer Halbleiteranordnung unter Verwendung dieses Substrates
JP2655052B2 (ja) * 1993-10-07 1997-09-17 日本電気株式会社 半導体装置およびその製造方法
JPH10178117A (ja) * 1996-12-17 1998-06-30 Sony Corp 半導体装置の製造方法
CN1215569C (zh) * 1999-03-15 2005-08-17 松下电器产业株式会社 半导体器件及其制造方法
JP3902888B2 (ja) * 1999-06-24 2007-04-11 松下電器産業株式会社 半導体装置及びその製造方法
US6444536B2 (en) * 1999-07-08 2002-09-03 Agere Systems Guardian Corp. Method for fabricating bipolar transistors

Also Published As

Publication number Publication date
US20030186500A1 (en) 2003-10-02
US6902970B2 (en) 2005-06-07
FR2835652A1 (fr) 2003-08-08

Similar Documents

Publication Publication Date Title
FR2838237B1 (fr) Procede de fabrication d'un transistor a effet de champ a grille isolee a canal contraint et circuit integre comprenant un tel transistor
FR2822293B1 (fr) Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier
FR2834575B1 (fr) Procede de modelisation et de realisation d'un circuit integre comportant au moins un transistor a effet de champ a grille isolee, et circuit integre correspondant
FR2823010B1 (fr) Procede de fabrication d'un transistor vertical a grille isolee a quadruple canal de conduction, et circuit integre comportant un tel transistor
FR2816109B1 (fr) Circuit integre a transistor a grille isolee et procede de fabrication
FR2812970B1 (fr) Transistor a effet de champ de type metal-oxyde-semiconducteur a sillicium sur isolant et son procede de fabrication
FR2823009B1 (fr) Procede de fabrication d'un transistor vertical a grille isolee a faible recouvrement de la grille sur la source et sur le drain, et circuit integre comportant un tel transistor
FR2858112B1 (fr) Dispositif a semi conducteur, procede de fabrication du dispositif a semiconducteur et circuit integre incluant le dispositif a semiconducteur
FR2778022B1 (fr) Transistor bibolaire vertical, en particulier a base a heterojonction sige, et procede de fabrication
FR2779573B1 (fr) Transistor bipolaire vertical comportant une base extrinseque de rugosite reduite, et procede de fabrication
EP1501119A4 (fr) Procede de fabrication de plaquettes semi-conductrices et plaquette
EP1676297A4 (fr) Transistors mosfet a haute performance et contrainte augmentee comportant une source/drain si:c et sige a croissance epitaxiale, et procede de fabrication
AU2003299587A8 (en) Silicon carbide power mos field effect transistors and manufacturing methods
EP1513195A4 (fr) Dispositif a semi-conducteurs et son procede de fabrication
FR2779572B1 (fr) Transistor bipolaire vertical a faible bruit et procede de fabrication correspondant
FR2858114B1 (fr) Transistor a effet de champ silicium sur isolant a double canal vertical et procede de fabrication
WO2006096749A3 (fr) Fabrication d'un dispositif semi-conducteur par retromordançage d'un espaceur
SG120977A1 (en) High performance semiconductor devices fabricated with strain-induced processes and methods for making same
FR2841381B1 (fr) Circuit integre a semi-conducteur et un procede de fabrication du circuit
EP1805790A4 (fr) Transistor a haute mobilite d'electrons (hemt) et son procede de fabrication
EP1043764A4 (fr) Plaquette a semi-conducteur et son procede de fabrication
EP1498955A4 (fr) Dispositif a semi-conducteur et son procede de fabrication
EP1437765A4 (fr) Procede de production de substrats de semi-conducteurs et procede de production de transistors a effet de champ, et substrats de semi-conducteurs et transistors a effet de champ
AU2003292827A1 (en) Semiconductor device, dram integrated circuit device, and its manufacturing method
AU2003206338A1 (en) Semiconductor fabrication process, lateral pnp transistor, and integrated circuit

Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20071030