FR2853452B1 - Procede de fabrication d'un dispositif semiconducteur comprenant un dielectrique de grille en materiau a haute permittivite dielectrique - Google Patents

Procede de fabrication d'un dispositif semiconducteur comprenant un dielectrique de grille en materiau a haute permittivite dielectrique

Info

Publication number
FR2853452B1
FR2853452B1 FR0304008A FR0304008A FR2853452B1 FR 2853452 B1 FR2853452 B1 FR 2853452B1 FR 0304008 A FR0304008 A FR 0304008A FR 0304008 A FR0304008 A FR 0304008A FR 2853452 B1 FR2853452 B1 FR 2853452B1
Authority
FR
France
Prior art keywords
manufacturing
semiconductor device
dielectric
high dielectric
grid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0304008A
Other languages
English (en)
Other versions
FR2853452A1 (fr
Inventor
Vincent Cosnier
Yves Morand
Olivier Kermarrec
Daniel Bensahel
Yves Campidelli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0304008A priority Critical patent/FR2853452B1/fr
Priority to US10/815,473 priority patent/US7129563B2/en
Publication of FR2853452A1 publication Critical patent/FR2853452A1/fr
Application granted granted Critical
Publication of FR2853452B1 publication Critical patent/FR2853452B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/0134—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01314—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of Ge, C or of compounds of Si, Ge or C contacting the insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01342—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid by deposition, e.g. evaporation, ALD or laser deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
FR0304008A 2003-04-01 2003-04-01 Procede de fabrication d'un dispositif semiconducteur comprenant un dielectrique de grille en materiau a haute permittivite dielectrique Expired - Fee Related FR2853452B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0304008A FR2853452B1 (fr) 2003-04-01 2003-04-01 Procede de fabrication d'un dispositif semiconducteur comprenant un dielectrique de grille en materiau a haute permittivite dielectrique
US10/815,473 US7129563B2 (en) 2003-04-01 2004-04-01 Method of fabricating a semiconductor device comprising a gate dielectric made of high dielectric permittivity material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0304008A FR2853452B1 (fr) 2003-04-01 2003-04-01 Procede de fabrication d'un dispositif semiconducteur comprenant un dielectrique de grille en materiau a haute permittivite dielectrique

Publications (2)

Publication Number Publication Date
FR2853452A1 FR2853452A1 (fr) 2004-10-08
FR2853452B1 true FR2853452B1 (fr) 2005-08-19

Family

ID=32982125

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0304008A Expired - Fee Related FR2853452B1 (fr) 2003-04-01 2003-04-01 Procede de fabrication d'un dispositif semiconducteur comprenant un dielectrique de grille en materiau a haute permittivite dielectrique

Country Status (2)

Country Link
US (1) US7129563B2 (fr)
FR (1) FR2853452B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2853452B1 (fr) * 2003-04-01 2005-08-19 St Microelectronics Sa Procede de fabrication d'un dispositif semiconducteur comprenant un dielectrique de grille en materiau a haute permittivite dielectrique
FR2853451B1 (fr) * 2003-04-03 2005-08-05 St Microelectronics Sa Couches monocristallines heteroatomiques
US7564108B2 (en) * 2004-12-20 2009-07-21 Taiwan Semiconductor Manufacturing Company, Ltd. Nitrogen treatment to improve high-k gate dielectrics
US7179676B2 (en) * 2005-03-28 2007-02-20 Kenet, Inc. Manufacturing CCDs in a conventional CMOS process
US7612421B2 (en) * 2005-10-11 2009-11-03 Atmel Corporation Electronic device with dopant diffusion barrier and tunable work function and methods of making same
US20080001237A1 (en) * 2006-06-29 2008-01-03 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having nitrided high-k gate dielectric and metal gate electrode and methods of forming same
US7998820B2 (en) * 2007-08-07 2011-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. High-k gate dielectric and method of manufacture

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5168072A (en) * 1990-10-12 1992-12-01 Texas Instruments Incorporated Method of fabricating an high-performance insulated-gate field-effect transistor
US5534713A (en) * 1994-05-20 1996-07-09 International Business Machines Corporation Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers
FR2765395B1 (fr) * 1997-06-30 1999-09-03 Sgs Thomson Microelectronics Procede de realisation de grille de transistors mos a forte teneur en germanium
FR2773177B1 (fr) * 1997-12-29 2000-03-17 France Telecom Procede d'obtention d'une couche de germanium ou silicium monocristallin sur un substrat de silicium ou germanium monocristallin, respectivement, et produits multicouches obtenus
FR2775119B1 (fr) * 1998-02-19 2000-04-07 France Telecom Procede pour limiter l'interdiffusion dans un dispositif semi-conducteur a grille composite si/si 1-x ge x, o inferieur a x inferieur ou egal a 1.
TW415103B (en) * 1998-03-02 2000-12-11 Ibm Si/SiGe optoelectronic integrated circuits
DE60042666D1 (de) * 1999-01-14 2009-09-17 Panasonic Corp Halbleiterbauelement und Verfahren zu dessen Herstellung
US6300202B1 (en) * 2000-05-18 2001-10-09 Motorola Inc. Selective removal of a metal oxide dielectric
JP3786566B2 (ja) * 2000-06-27 2006-06-14 株式会社東芝 半導体装置及びその製造方法
KR100402381B1 (ko) * 2001-02-09 2003-10-17 삼성전자주식회사 게르마늄 함유 폴리실리콘 게이트를 가지는 씨모스형반도체 장치 및 그 형성방법
US6974735B2 (en) * 2001-08-09 2005-12-13 Amberwave Systems Corporation Dual layer Semiconductor Devices
US6451641B1 (en) * 2002-02-27 2002-09-17 Advanced Micro Devices, Inc. Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric material
FR2853452B1 (fr) * 2003-04-01 2005-08-19 St Microelectronics Sa Procede de fabrication d'un dispositif semiconducteur comprenant un dielectrique de grille en materiau a haute permittivite dielectrique
US7348284B2 (en) * 2004-08-10 2008-03-25 Intel Corporation Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow

Also Published As

Publication number Publication date
FR2853452A1 (fr) 2004-10-08
US20040256699A1 (en) 2004-12-23
US7129563B2 (en) 2006-10-31

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Effective date: 20091231