FR2857155B1 - Procede de fabrication de couches contraintes de silicium ou d'un alliage de silicium-germanium - Google Patents

Procede de fabrication de couches contraintes de silicium ou d'un alliage de silicium-germanium

Info

Publication number
FR2857155B1
FR2857155B1 FR0307982A FR0307982A FR2857155B1 FR 2857155 B1 FR2857155 B1 FR 2857155B1 FR 0307982 A FR0307982 A FR 0307982A FR 0307982 A FR0307982 A FR 0307982A FR 2857155 B1 FR2857155 B1 FR 2857155B1
Authority
FR
France
Prior art keywords
silicon
germanium alloy
concealed
manufacturing
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0307982A
Other languages
English (en)
Other versions
FR2857155A1 (fr
Inventor
Aomar Halimaoui
Daniel Bensahel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0307982A priority Critical patent/FR2857155B1/fr
Priority to US10/882,995 priority patent/US7279404B2/en
Publication of FR2857155A1 publication Critical patent/FR2857155A1/fr
Application granted granted Critical
Publication of FR2857155B1 publication Critical patent/FR2857155B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3204—Materials thereof being Group IVA semiconducting materials
    • H10P14/3211—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3256—Microstructure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3822—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/96—Porous semiconductor
FR0307982A 2003-07-01 2003-07-01 Procede de fabrication de couches contraintes de silicium ou d'un alliage de silicium-germanium Expired - Fee Related FR2857155B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0307982A FR2857155B1 (fr) 2003-07-01 2003-07-01 Procede de fabrication de couches contraintes de silicium ou d'un alliage de silicium-germanium
US10/882,995 US7279404B2 (en) 2003-07-01 2004-07-01 Process for fabricating strained layers of silicon or of a silicon/germanium alloy

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0307982A FR2857155B1 (fr) 2003-07-01 2003-07-01 Procede de fabrication de couches contraintes de silicium ou d'un alliage de silicium-germanium

Publications (2)

Publication Number Publication Date
FR2857155A1 FR2857155A1 (fr) 2005-01-07
FR2857155B1 true FR2857155B1 (fr) 2005-10-21

Family

ID=33522654

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0307982A Expired - Fee Related FR2857155B1 (fr) 2003-07-01 2003-07-01 Procede de fabrication de couches contraintes de silicium ou d'un alliage de silicium-germanium

Country Status (2)

Country Link
US (1) US7279404B2 (fr)
FR (1) FR2857155B1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10833175B2 (en) 2015-06-04 2020-11-10 International Business Machines Corporation Formation of dislocation-free SiGe finFET using porous silicon
US9627536B2 (en) * 2015-06-25 2017-04-18 International Busines Machines Corporation Field effect transistors with strained channel features
CN113529159A (zh) * 2020-04-21 2021-10-22 中国科学院物理研究所 GeSi合金基板的制备方法及其产品和应用

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69233314T2 (de) * 1991-10-11 2005-03-24 Canon K.K. Verfahren zur Herstellung von Halbleiter-Produkten
JP3293736B2 (ja) * 1996-02-28 2002-06-17 キヤノン株式会社 半導体基板の作製方法および貼り合わせ基体
US6376859B1 (en) * 1998-07-29 2002-04-23 Texas Instruments Incorporated Variable porosity porous silicon isolation
US6410436B2 (en) * 1999-03-26 2002-06-25 Canon Kabushiki Kaisha Method of cleaning porous body, and process for producing porous body, non-porous film or bonded substrate
US6677192B1 (en) * 2001-03-02 2004-01-13 Amberwave Systems Corporation Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuits
US6603156B2 (en) * 2001-03-31 2003-08-05 International Business Machines Corporation Strained silicon on insulator structures
US6593625B2 (en) * 2001-06-12 2003-07-15 International Business Machines Corporation Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing
KR100442105B1 (ko) * 2001-12-03 2004-07-27 삼성전자주식회사 소이형 기판 형성 방법
FR2839505B1 (fr) * 2002-05-07 2005-07-15 Univ Claude Bernard Lyon Procede pour modifier les proprietes d'une couche mince et substrat faisant application du procede
US7018910B2 (en) * 2002-07-09 2006-03-28 S.O.I.Tec Silicon On Insulator Technologies S.A. Transfer of a thin layer from a wafer comprising a buffer layer
US6953736B2 (en) * 2002-07-09 2005-10-11 S.O.I.Tec Silicon On Insulator Technologies S.A. Process for transferring a layer of strained semiconductor material
US6812116B2 (en) * 2002-12-13 2004-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance

Also Published As

Publication number Publication date
US7279404B2 (en) 2007-10-09
US20050037599A1 (en) 2005-02-17
FR2857155A1 (fr) 2005-01-07

Similar Documents

Publication Publication Date Title
EP1561571A4 (fr) Procede de fabrication d'article photochromique en couches
EP1592053A4 (fr) Procede de fabrication d'un cablage
EP1394111A4 (fr) Procede de fabrication de silicium
EP1789615A4 (fr) Etoupe d'acetocellulose et son procede de fabrication
FR2841631B1 (fr) Structure de raccord de tuyau et son procede de fabrication
EP1643544A4 (fr) Procede de fabrication d'une tranche epitaxiale en silicium et tranche epitaxiale en silicium
EP1881535A4 (fr) Element semiconducteur a base de nitrure et son procede de fabrication
EP2003729A4 (fr) Ensemble d'antennes et son procede de fabrication
EP1409397A4 (fr) Purificateur de lignes de fabrication de boissons
EP1663866A4 (fr) Diamants resistants et procede de fabrication associe
EP1488920A4 (fr) Placoplatre et son procede de fabrication
EP1509946A4 (fr) Procede de fabrication de pilotes integres
EP1592052A4 (fr) Procede de fabrication d'un affichage
EP1357611A4 (fr) Piece fonctionnelle piezo-electrique et son procede de fabrication
FR2871650B1 (fr) Element chauffant, son procede de fabrication, article dote d'un tel element et son procede de fabrication
EP1602624A4 (fr) Element mems et son procede de fabrication et element mems de type diffraction
FR2841191B1 (fr) Glissiere pour siege de vehicule et son procede de fabrication
EP1602743A4 (fr) Poussoir de soupape nitrure et son procede de fabrication
EP1548691A4 (fr) Procede de fabrication d'ecran plasma
AU2003261857A1 (en) Semiconductor device manufacturing method
EP1456355A4 (fr) Procede de fabrication de leucocytes phagocytaires mononucleaires humains
EP1638136A4 (fr) Plaquette epitaxiale en silicium et son procede de fabrication
EP1834655A4 (fr) Boitier de purificateur sanguin et son procede de fabrication
EP1868251A4 (fr) Element semi-conducteur et son procede de fabrication
EP1746186A4 (fr) Procede de fabrication d'un monocristal de silicium et monocristal de silicium

Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090331