FR2890236B1 - Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin - Google Patents

Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin

Info

Publication number
FR2890236B1
FR2890236B1 FR0508878A FR0508878A FR2890236B1 FR 2890236 B1 FR2890236 B1 FR 2890236B1 FR 0508878 A FR0508878 A FR 0508878A FR 0508878 A FR0508878 A FR 0508878A FR 2890236 B1 FR2890236 B1 FR 2890236B1
Authority
FR
France
Prior art keywords
polycrystalline
thin film
amorphous silicon
silicon thin
film circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0508878A
Other languages
English (en)
Other versions
FR2890236A1 (fr
Inventor
Walid Benzarti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0508878A priority Critical patent/FR2890236B1/fr
Priority to PCT/EP2006/065769 priority patent/WO2007025962A1/fr
Priority to EP06793054A priority patent/EP1929518A1/fr
Priority to US12/064,475 priority patent/US20090212286A1/en
Priority to JP2008528499A priority patent/JP2009506563A/ja
Publication of FR2890236A1 publication Critical patent/FR2890236A1/fr
Application granted granted Critical
Publication of FR2890236B1 publication Critical patent/FR2890236B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/425—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer having different crystal properties in different TFTs or within an individual TFT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/471—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
FR0508878A 2005-08-30 2005-08-30 Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin Expired - Fee Related FR2890236B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR0508878A FR2890236B1 (fr) 2005-08-30 2005-08-30 Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin
PCT/EP2006/065769 WO2007025962A1 (fr) 2005-08-30 2006-08-29 Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin
EP06793054A EP1929518A1 (fr) 2005-08-30 2006-08-29 Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin
US12/064,475 US20090212286A1 (en) 2005-08-30 2006-08-29 Method for making amorphous polycrystalline silicon thin-film circuits
JP2008528499A JP2009506563A (ja) 2005-08-30 2006-08-29 アモルファス多結晶シリコン薄膜回路の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0508878A FR2890236B1 (fr) 2005-08-30 2005-08-30 Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin

Publications (2)

Publication Number Publication Date
FR2890236A1 FR2890236A1 (fr) 2007-03-02
FR2890236B1 true FR2890236B1 (fr) 2007-11-30

Family

ID=36643247

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0508878A Expired - Fee Related FR2890236B1 (fr) 2005-08-30 2005-08-30 Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin

Country Status (5)

Country Link
US (1) US20090212286A1 (fr)
EP (1) EP1929518A1 (fr)
JP (1) JP2009506563A (fr)
FR (1) FR2890236B1 (fr)
WO (1) WO2007025962A1 (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8354674B2 (en) * 2007-06-29 2013-01-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device wherein a property of a first semiconductor layer is different from a property of a second semiconductor layer
WO2009013873A1 (fr) * 2007-07-20 2009-01-29 Sharp Kabushiki Kaisha Procédé de fabrication de film stratifié, procédé de fabrication de dispositif semi-conducteur, dispositif semi-conducteur et dispositif d'affichage
JP2012237805A (ja) * 2011-05-10 2012-12-06 Sony Corp 表示装置及び電子機器
US10002968B2 (en) 2011-12-14 2018-06-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and display device including the same
CN103367353A (zh) * 2012-03-30 2013-10-23 东莞万士达液晶显示器有限公司 主动元件及主动元件阵列基板
US9293512B2 (en) * 2012-11-02 2016-03-22 Apple Inc. Device and method for improving AMOLED driving
WO2015052991A1 (fr) * 2013-10-09 2015-04-16 シャープ株式会社 Dispositif à semi-conducteurs et son procédé de fabrication
KR102186576B1 (ko) 2014-03-21 2020-12-04 삼성디스플레이 주식회사 액정 표시 패널 및 이의 제조 방법
US9536945B1 (en) 2015-07-30 2017-01-03 International Business Machines Corporation MOSFET with ultra low drain leakage
CN106952928B (zh) * 2017-03-30 2018-10-23 深圳市华星光电技术有限公司 一种tft背板的制作方法及tft背板
WO2022043826A1 (fr) 2020-08-27 2022-03-03 株式会社半導体エネルギー研究所 Dispositif à semi-conducteur, dispositif d'affichage et dispositif électronique

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05299653A (ja) * 1991-04-05 1993-11-12 Fuji Xerox Co Ltd 半導体装置及びその製造方法
JPH05232506A (ja) * 1992-02-20 1993-09-10 Seiko Epson Corp 液晶表示装置
JPH05315616A (ja) * 1992-05-08 1993-11-26 Hitachi Ltd 半導体装置及び薄膜トランジスタ
JP3009975B2 (ja) * 1992-11-30 2000-02-14 シャープ株式会社 シリコン薄膜のドライエッチング方法
KR100268007B1 (ko) * 1992-12-22 2000-10-16 구본준 액정표시소자 제조방법
JPH0792500A (ja) * 1993-06-29 1995-04-07 Toshiba Corp 半導体装置
JPH09236818A (ja) * 1996-03-01 1997-09-09 Toshiba Electron Eng Corp 薄膜トランジスタアレイ及びその製造方法
US5920772A (en) 1997-06-27 1999-07-06 Industrial Technology Research Institute Method of fabricating a hybrid polysilicon/amorphous silicon TFT
JPH1197691A (ja) * 1997-09-18 1999-04-09 Toshiba Corp 薄膜トランジスタおよび接合構造
JPH11274505A (ja) * 1998-03-23 1999-10-08 Nec Corp 薄膜トランジスタ構造およびその製造方法
JP2000349290A (ja) * 1999-06-01 2000-12-15 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
GB0029315D0 (en) * 2000-12-01 2001-01-17 Koninkl Philips Electronics Nv Method of increasing the conductivity of a transparent conductive layer
JP2002185005A (ja) 2000-12-15 2002-06-28 Matsushita Electric Ind Co Ltd 混成ｔｆｔアレー基板とその製造方法
JP2003241688A (ja) * 2002-02-18 2003-08-29 Matsushita Electric Ind Co Ltd 表示装置
GB0219771D0 (en) * 2002-08-24 2002-10-02 Koninkl Philips Electronics Nv Manufacture of electronic devices comprising thin-film circuit elements

Also Published As

Publication number Publication date
EP1929518A1 (fr) 2008-06-11
US20090212286A1 (en) 2009-08-27
JP2009506563A (ja) 2009-02-12
FR2890236A1 (fr) 2007-03-02
WO2007025962A1 (fr) 2007-03-08

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Legal Events

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ST Notification of lapse

Effective date: 20110502