FR2906377B1 - Generateur et procede de generation de signal d'horloge - Google Patents

Generateur et procede de generation de signal d'horloge

Info

Publication number
FR2906377B1
FR2906377B1 FR0756490A FR0756490A FR2906377B1 FR 2906377 B1 FR2906377 B1 FR 2906377B1 FR 0756490 A FR0756490 A FR 0756490A FR 0756490 A FR0756490 A FR 0756490A FR 2906377 B1 FR2906377 B1 FR 2906377B1
Authority
FR
France
Prior art keywords
generator
clock signal
generating clock
generating
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0756490A
Other languages
English (en)
Other versions
FR2906377A1 (fr
Inventor
Hyuk Jun Sung
Chan Yong Kim
Jong Pil Cho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2906377A1 publication Critical patent/FR2906377A1/fr
Application granted granted Critical
Publication of FR2906377B1 publication Critical patent/FR2906377B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/12—Shaping pulses by steepening leading or trailing edges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
FR0756490A 2006-09-26 2007-07-13 Generateur et procede de generation de signal d'horloge Active FR2906377B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020060093634A KR100741470B1 (ko) 2006-09-26 2006-09-26 유에스비 장치를 위한 클럭 발생기

Publications (2)

Publication Number Publication Date
FR2906377A1 FR2906377A1 (fr) 2008-03-28
FR2906377B1 true FR2906377B1 (fr) 2016-12-09

Family

ID=38499220

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0756490A Active FR2906377B1 (fr) 2006-09-26 2007-07-13 Generateur et procede de generation de signal d'horloge

Country Status (4)

Country Link
US (1) US7873858B2 (fr)
KR (1) KR100741470B1 (fr)
CN (1) CN101154118B (fr)
FR (1) FR2906377B1 (fr)

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TW200921325A (en) * 2007-11-05 2009-05-16 Holtek Semiconductor Inc Frequency synchronous apparatus and method
JP2010165403A (ja) * 2009-01-14 2010-07-29 Zoom Corp マルチトラックレコーダ、及び複数台のマルチトラックレコーダによる同期録音方法
CN101931397A (zh) * 2009-06-23 2010-12-29 义隆电子股份有限公司 校正usb装置频率的方法及电路
TWI410806B (zh) * 2009-10-16 2013-10-01 Elan Microelectronics Corp A method and a circuit for correcting the frequency of the USB device, and a method of identifying whether or not the input packet is a tag packet
CN102063402B (zh) * 2009-11-12 2015-01-14 义隆电子股份有限公司 校正usb装置频率的方法及电路
TWI444823B (zh) * 2011-03-31 2014-07-11 Phison Electronics Corp 參考頻率設定方法、記憶體控制器及快閃記憶體儲存裝置
JP5799797B2 (ja) * 2011-12-21 2015-10-28 富士通株式会社 算出方法、算出プログラム及びコンピュータ
JP5677376B2 (ja) * 2012-07-06 2015-02-25 株式会社東芝 メモリ制御装置、半導体装置、およびシステムボード
CN102819282B (zh) * 2012-07-26 2016-02-24 大唐微电子技术有限公司 一种时钟恢复电路装置及相应的方法
CN104035480B (zh) * 2013-03-08 2018-05-11 群联电子股份有限公司 参考频率设定方法、存储器控制器及存储器存储装置
US9713090B2 (en) 2014-03-24 2017-07-18 Silicon Laboratories Inc. Low-power communication apparatus and associated methods
US9886412B2 (en) * 2014-03-24 2018-02-06 Silicon Laboratories Inc. Communication apparatus having an oscillator that is disabled based on idle state detection of a communication link and associated methods
US10514747B2 (en) 2014-03-24 2019-12-24 Silicon Laboratories Inc. Low-power communication apparatus with wakeup detection and associated methods
US10890939B2 (en) * 2017-04-24 2021-01-12 Cirrus Logic, Inc. Recovery of reference clock on a device
CN108614795B (zh) * 2018-04-12 2020-06-26 深圳市汇春科技股份有限公司 一种usb数据传输的数字实现方法
CN112749118B (zh) * 2019-10-29 2024-03-29 瑞昱半导体股份有限公司 数据收发装置及其操作方法
TWI841123B (zh) * 2022-12-16 2024-05-01 新唐科技股份有限公司 微控制電路及控制方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2776098B2 (ja) * 1991-11-27 1998-07-16 松下電器産業株式会社 クロック再生回路および時間軸誤差補正装置
US6642754B1 (en) * 1999-07-21 2003-11-04 Siemens Aktiengesellschaft Clock signal generator employing a DDS circuit
FR2803925B1 (fr) * 2000-01-18 2002-03-15 St Microelectronics Sa Dispositif de regeneration d'une horloge a partir d'au moins deux bits de synchronisation
JP2001257664A (ja) * 2000-03-14 2001-09-21 Nec Corp ディジタル放送受信機におけるクロック周波数同期制御回路
US6343364B1 (en) * 2000-07-13 2002-01-29 Schlumberger Malco Inc. Method and device for local clock generation using universal serial bus downstream received signals DP and DM
DE10041772C2 (de) * 2000-08-25 2002-07-11 Infineon Technologies Ag Taktgenerator, insbesondere für USB-Geräte
KR20020057697A (ko) 2001-01-05 2002-07-12 윤종용 범용 직렬 버스용 클록 복원 회로
JP2003078512A (ja) 2001-09-05 2003-03-14 Sony Corp クロック信号生成回路およびクロック信号生成方法
KR20030065600A (ko) * 2002-01-30 2003-08-09 엘지이노텍 주식회사 가변 변조 클럭 발생기
KR100448707B1 (ko) 2002-08-20 2004-09-13 삼성전자주식회사 클럭 및 데이터 복원 회로 및 방법
DE10262079A1 (de) * 2002-12-23 2004-11-18 Infineon Technologies Ag Verfahren und Vorrichtung zum Extrahieren einer einem Datenstrom zugrundeliegenden Taktfrequenz
US7120813B2 (en) * 2003-01-28 2006-10-10 Robert Antoine Leydier Method and apparatus for clock synthesis using universal serial bus downstream received signals
KR20040093854A (ko) * 2003-04-30 2004-11-09 매그나칩 반도체 유한회사 Ｐｓ2 전송장치
JP4812066B2 (ja) * 2003-10-09 2011-11-09 ルネサスエレクトロニクス株式会社 半導体集積回路
US7358826B2 (en) * 2004-03-22 2008-04-15 Mobius Microsystems, Inc. Discrete clock generator and timing/frequency reference
KR100990484B1 (ko) * 2004-03-29 2010-10-29 삼성전자주식회사 직렬 버스 통신을 위한 송신 클럭 신호 발생기
KR100706605B1 (ko) 2004-11-16 2007-04-12 한국전자통신연구원 클럭 및 데이터 복원 장치
TWI302784B (en) * 2005-10-25 2008-11-01 Holtek Semiconductor Inc Auto-adjusting high accuracy oscillator

Also Published As

Publication number Publication date
US20080079465A1 (en) 2008-04-03
FR2906377A1 (fr) 2008-03-28
CN101154118B (zh) 2011-04-20
CN101154118A (zh) 2008-04-02
US7873858B2 (en) 2011-01-18
KR100741470B1 (ko) 2007-07-20

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