FR2908948B1 - Boucle a verrouillage de phase numerique - Google Patents

Boucle a verrouillage de phase numerique

Info

Publication number
FR2908948B1
FR2908948B1 FR0759134A FR0759134A FR2908948B1 FR 2908948 B1 FR2908948 B1 FR 2908948B1 FR 0759134 A FR0759134 A FR 0759134A FR 0759134 A FR0759134 A FR 0759134A FR 2908948 B1 FR2908948 B1 FR 2908948B1
Authority
FR
France
Prior art keywords
phase lock
digital phase
lock buckle
buckle
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0759134A
Other languages
English (en)
Other versions
FR2908948A1 (fr
Inventor
Der Valk Robertus Laurentius Van
Paulus Hendricus Lodewijk Schram
Rijk Johannes Hermanus Aloysius De
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsemi Semiconductor ULC
Original Assignee
Zarlink Semoconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zarlink Semoconductor Inc filed Critical Zarlink Semoconductor Inc
Publication of FR2908948A1 publication Critical patent/FR2908948A1/fr
Application granted granted Critical
Publication of FR2908948B1 publication Critical patent/FR2908948B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/50—All digital phase-locked loop
FR0759134A 2006-11-17 2007-11-19 Boucle a verrouillage de phase numerique Expired - Fee Related FR2908948B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB0622948.8A GB0622948D0 (en) 2006-11-17 2006-11-17 A digital phase locked loop

Publications (2)

Publication Number Publication Date
FR2908948A1 FR2908948A1 (fr) 2008-05-23
FR2908948B1 true FR2908948B1 (fr) 2011-05-06

Family

ID=37605469

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0759134A Expired - Fee Related FR2908948B1 (fr) 2006-11-17 2007-11-19 Boucle a verrouillage de phase numerique

Country Status (5)

Country Link
US (1) US7642862B2 (fr)
CN (1) CN101183869B (fr)
DE (1) DE102007054383B4 (fr)
FR (1) FR2908948B1 (fr)
GB (1) GB0622948D0 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8170169B2 (en) * 2006-12-01 2012-05-01 Snowbush Inc. Serializer deserializer circuits
US8102195B2 (en) * 2009-05-13 2012-01-24 Mediatek Inc. Digital phase-locked loop circuit including a phase delay quantizer and method of use
US8957711B2 (en) * 2013-04-29 2015-02-17 Microsemi Semiconductor Ulc Phase locked loop with precise phase and frequency slope limiter
US9397689B2 (en) * 2014-11-24 2016-07-19 Intel Corporation Interpolator systems and methods
US9577648B2 (en) 2014-12-31 2017-02-21 Semtech Corporation Semiconductor device and method for accurate clock domain synchronization over a wide frequency range
US9667237B2 (en) * 2015-03-31 2017-05-30 Microsemi Semiconductor Ulc Hardware delay compensation in digital phase locked loop
CN105262480A (zh) * 2015-10-22 2016-01-20 江苏绿扬电子仪器集团有限公司 一种从高速串行信号中恢复时钟信号的系统
US10069503B2 (en) * 2016-05-30 2018-09-04 Microsemi Semiconductor Ulc Method of speeding up output alignment in a digital phase locked loop
WO2018072836A1 (fr) 2016-10-20 2018-04-26 Huawei Technologies Co., Ltd. Oscillateur à commande numérique de haute précision

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5473285A (en) * 1993-12-13 1995-12-05 Motorola, Inc. Method and apparatus for performing phase acquisition in an all digital phase lock loop
GB9414729D0 (en) * 1994-07-21 1994-09-07 Mitel Corp Digital phase locked loop
GB9615422D0 (en) 1996-07-23 1996-09-04 3Com Ireland Digital phase locked loop
US5727038A (en) * 1996-09-06 1998-03-10 Motorola, Inc. Phase locked loop using digital loop filter and digitally controlled oscillator
US6532271B1 (en) * 1999-10-29 2003-03-11 Cadence Design Systems, Inc. Carrier recovery and doppler frequency estimation
DE10022486C1 (de) * 2000-05-09 2002-01-17 Infineon Technologies Ag Digitaler Phasenregelkreis
GB2363268B (en) * 2000-06-08 2004-04-14 Mitel Corp Timing circuit with dual phase locked loops
CA2398408A1 (fr) * 2001-08-17 2003-02-17 Dynagen Technologies Incorporated Ensemble de commutateur de transfert d'alimentation
US6798296B2 (en) * 2002-03-28 2004-09-28 Texas Instruments Incorporated Wide band, wide operation range, general purpose digital phase locked loop architecture
US7145399B2 (en) 2002-06-19 2006-12-05 Texas Instruments Incorporated Type-II all-digital phase-locked loop (PLL)
JP3869447B2 (ja) * 2003-03-06 2007-01-17 富士通株式会社 ディジタルｐｌｌ回路
JP3803805B2 (ja) 2003-09-05 2006-08-02 日本テキサス・インスツルメンツ株式会社 ディジタル位相同期ループ回路
US7061276B2 (en) 2004-04-02 2006-06-13 Teradyne, Inc. Digital phase detector
US7643595B2 (en) * 2004-09-13 2010-01-05 Nortel Networks Limited Method and apparatus for synchronizing clock timing between network elements

Also Published As

Publication number Publication date
FR2908948A1 (fr) 2008-05-23
US20080116982A1 (en) 2008-05-22
US7642862B2 (en) 2010-01-05
GB0622948D0 (en) 2006-12-27
CN101183869B (zh) 2012-03-28
CN101183869A (zh) 2008-05-21
DE102007054383B4 (de) 2011-03-31
DE102007054383A1 (de) 2008-05-29

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20130731