FR2936626B1 - Dispositif de traitement en parallele d'un flux de donnees - Google Patents

Dispositif de traitement en parallele d'un flux de donnees

Info

Publication number
FR2936626B1
FR2936626B1 FR0805369A FR0805369A FR2936626B1 FR 2936626 B1 FR2936626 B1 FR 2936626B1 FR 0805369 A FR0805369 A FR 0805369A FR 0805369 A FR0805369 A FR 0805369A FR 2936626 B1 FR2936626 B1 FR 2936626B1
Authority
FR
France
Prior art keywords
data stream
parallel processing
parallel
processing
stream
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0805369A
Other languages
English (en)
Other versions
FR2936626A1 (fr
Inventor
Laurent Letellier
Mathieu Thevenin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0805369A priority Critical patent/FR2936626B1/fr
Priority to PCT/EP2009/057033 priority patent/WO2010037570A1/fr
Priority to US13/121,417 priority patent/US8836708B2/en
Priority to JP2011528264A priority patent/JP2012504264A/ja
Priority to EP09779672A priority patent/EP2332067A1/fr
Publication of FR2936626A1 publication Critical patent/FR2936626A1/fr
Application granted granted Critical
Publication of FR2936626B1 publication Critical patent/FR2936626B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8015—One dimensional arrays, e.g. rings, linear arrays, buses
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Image Processing (AREA)
FR0805369A 2008-09-30 2008-09-30 Dispositif de traitement en parallele d'un flux de donnees Active FR2936626B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR0805369A FR2936626B1 (fr) 2008-09-30 2008-09-30 Dispositif de traitement en parallele d'un flux de donnees
PCT/EP2009/057033 WO2010037570A1 (fr) 2008-09-30 2009-06-08 Dispositif de traitement en parallele d'un flux de donnees
US13/121,417 US8836708B2 (en) 2008-09-30 2009-06-08 Device for the parallel processing of a data stream
JP2011528264A JP2012504264A (ja) 2008-09-30 2009-06-08 データストリームの並行処理装置
EP09779672A EP2332067A1 (fr) 2008-09-30 2009-06-08 Dispositif de traitement en parallele d'un flux de donnees

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0805369A FR2936626B1 (fr) 2008-09-30 2008-09-30 Dispositif de traitement en parallele d'un flux de donnees

Publications (2)

Publication Number Publication Date
FR2936626A1 FR2936626A1 (fr) 2010-04-02
FR2936626B1 true FR2936626B1 (fr) 2011-03-25

Family

ID=40350007

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0805369A Active FR2936626B1 (fr) 2008-09-30 2008-09-30 Dispositif de traitement en parallele d'un flux de donnees

Country Status (5)

Country Link
US (1) US8836708B2 (fr)
EP (1) EP2332067A1 (fr)
JP (1) JP2012504264A (fr)
FR (1) FR2936626B1 (fr)
WO (1) WO2010037570A1 (fr)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201322022A (zh) 2011-11-24 2013-06-01 Alibaba Group Holding Ltd 分散式資料流處理方法及其系統
FR2988190A1 (fr) * 2012-03-13 2013-09-20 Commissariat Energie Atomique Procede d'acquisition et de traitement de signaux
US9514094B2 (en) * 2012-07-10 2016-12-06 Maxeler Technologies Ltd Processing data sets using dedicated logic units to prevent data collision in a pipelined stream processor
US9905200B2 (en) * 2015-10-19 2018-02-27 Yahoo Holdings, Inc. Computerized system and method for automatically creating and applying a filter to alter the display of rendered media
US10942673B2 (en) 2016-03-31 2021-03-09 Hewlett Packard Enterprise Development Lp Data processing using resistive memory arrays
US11243880B1 (en) 2017-09-15 2022-02-08 Groq, Inc. Processor architecture
US11868804B1 (en) 2019-11-18 2024-01-09 Groq, Inc. Processor instruction dispatch configuration
US11114138B2 (en) 2017-09-15 2021-09-07 Groq, Inc. Data structures with multiple read ports
US11360934B1 (en) 2017-09-15 2022-06-14 Groq, Inc. Tensor streaming processor architecture
US11170307B1 (en) 2017-09-21 2021-11-09 Groq, Inc. Predictive model compiler for generating a statically scheduled binary with known resource constraints
US20190294443A1 (en) * 2018-03-20 2019-09-26 Qualcomm Incorporated Providing early pipeline optimization of conditional instructions in processor-based systems
US11861429B2 (en) 2018-04-30 2024-01-02 Hewlett Packard Enterprise Development Lp Resistive and digital processing cores
US10652162B2 (en) * 2018-06-30 2020-05-12 Intel Corporation Scalable packet processing
US11455370B2 (en) 2018-11-19 2022-09-27 Groq, Inc. Flattened input stream generation for convolution with expanded kernel
US12340300B1 (en) 2018-09-14 2025-06-24 Groq, Inc. Streaming processor architecture
CN109542985B (zh) * 2018-11-27 2023-09-19 南京擎天科技有限公司 一种通用流式数据分析模型及其构建方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5784631A (en) * 1992-06-30 1998-07-21 Discovision Associates Huffman decoder
US6041400A (en) * 1998-10-26 2000-03-21 Sony Corporation Distributed extensible processing architecture for digital signal processing applications
US20070242074A1 (en) * 1999-04-09 2007-10-18 Dave Stuttard Parallel data processing apparatus
US6961084B1 (en) * 1999-10-07 2005-11-01 Ess Technology, Inc. Programmable image transform processor
US7196708B2 (en) * 2004-03-31 2007-03-27 Sony Corporation Parallel vector processing
WO2007049282A2 (fr) * 2005-10-26 2007-05-03 Cortica Ltd. Dispositif informatique, systeme et procede de traitement de flux de donnees en parallele
US7788468B1 (en) * 2005-12-15 2010-08-31 Nvidia Corporation Synchronization of threads in a cooperative thread array
US7912889B1 (en) * 2006-06-16 2011-03-22 Nvidia Corporation Mapping the threads of a CTA to the elements of a tile for efficient matrix multiplication
US8181168B1 (en) * 2007-02-07 2012-05-15 Tilera Corporation Memory access assignment for parallel processing architectures

Also Published As

Publication number Publication date
US20110273459A1 (en) 2011-11-10
WO2010037570A1 (fr) 2010-04-08
JP2012504264A (ja) 2012-02-16
US8836708B2 (en) 2014-09-16
EP2332067A1 (fr) 2011-06-15
FR2936626A1 (fr) 2010-04-02

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